| commit | 51ac7eec620b8ec705955ad2c845a5b5fed6b40f | [log] [tgz] |
|---|---|---|
| author | Yong Zhao <Yong.Zhao@amd.com> | Thu Jul 27 12:48:22 2017 -0400 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Aug 15 14:45:58 2017 -0400 |
| tree | db1de1243647e0e728a331f0e38b12da9a6223f8 | |
| parent | 2046d46db9166bddc84778f0b3477f6d1e9068ea [diff] |
drm/amdgpu: Support IOMMU on Raven We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>