| commit | 51279ef9f64cf7eb8b3f891a2b60fa1aa4938afc | [log] [tgz] |
|---|---|---|
| author | Sergej Sawazki <sergej@taudac.com> | Sat Sep 16 13:44:41 2017 +0200 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Thu Dec 21 18:09:18 2017 -0800 |
| tree | 8406d6a2eb541671c99e636161023430a01054df | |
| parent | 758231d5a80a784d60ce7c96b27f8771ca4c682b [diff] |
clk: si5351: Add DT property to enable PLL reset Add optional output clock DT property to enable PLL reset when a clock output is enabled. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>