drm/i915: sseu: Use sseu_dev_info in device info
Move all slice/subslice/eu related properties to the sseu_dev_info
struct.
No functional change.
v2:
- s/info/sseu/ based on the new struct name. (Ben)
Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e9468c6..91fcc63 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -5058,7 +5058,7 @@
sseu->slice_total++;
if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
- ss_cnt = INTEL_INFO(dev_priv)->subslice_per_slice;
+ ss_cnt = INTEL_INFO(dev_priv)->sseu.subslice_per_slice;
for (ss = 0; ss < ss_max; ss++) {
unsigned int eu_cnt;
@@ -5095,15 +5095,18 @@
sseu->slice_total = hweight32(slice_info & GEN8_LSLICESTAT_MASK);
if (sseu->slice_total) {
- sseu->subslice_per_slice = INTEL_INFO(dev_priv)->subslice_per_slice;
+ sseu->subslice_per_slice =
+ INTEL_INFO(dev_priv)->sseu.subslice_per_slice;
sseu->subslice_total = sseu->slice_total *
sseu->subslice_per_slice;
- sseu->eu_per_subslice = INTEL_INFO(dev_priv)->eu_per_subslice;
+ sseu->eu_per_subslice =
+ INTEL_INFO(dev_priv)->sseu.eu_per_subslice;
sseu->eu_total = sseu->eu_per_subslice * sseu->subslice_total;
/* subtract fused off EU(s) from enabled slice(s) */
for (s = 0; s < sseu->slice_total; s++) {
- u8 subslice_7eu = INTEL_INFO(dev_priv)->subslice_7eu[s];
+ u8 subslice_7eu =
+ INTEL_INFO(dev_priv)->sseu.subslice_7eu[s];
sseu->eu_total -= hweight8(subslice_7eu);
}
@@ -5120,25 +5123,25 @@
seq_puts(m, "SSEU Device Info\n");
seq_printf(m, " Available Slice Total: %u\n",
- INTEL_INFO(dev_priv)->slice_total);
+ INTEL_INFO(dev_priv)->sseu.slice_total);
seq_printf(m, " Available Subslice Total: %u\n",
- INTEL_INFO(dev_priv)->subslice_total);
+ INTEL_INFO(dev_priv)->sseu.subslice_total);
seq_printf(m, " Available Subslice Per Slice: %u\n",
- INTEL_INFO(dev_priv)->subslice_per_slice);
+ INTEL_INFO(dev_priv)->sseu.subslice_per_slice);
seq_printf(m, " Available EU Total: %u\n",
- INTEL_INFO(dev_priv)->eu_total);
+ INTEL_INFO(dev_priv)->sseu.eu_total);
seq_printf(m, " Available EU Per Subslice: %u\n",
- INTEL_INFO(dev_priv)->eu_per_subslice);
+ INTEL_INFO(dev_priv)->sseu.eu_per_subslice);
seq_printf(m, " Has Pooled EU: %s\n", yesno(HAS_POOLED_EU(dev_priv)));
if (HAS_POOLED_EU(dev_priv))
seq_printf(m, " Min EU in pool: %u\n",
- INTEL_INFO(dev_priv)->min_eu_in_pool);
+ INTEL_INFO(dev_priv)->sseu.min_eu_in_pool);
seq_printf(m, " Has Slice Power Gating: %s\n",
- yesno(INTEL_INFO(dev_priv)->has_slice_pg));
+ yesno(INTEL_INFO(dev_priv)->sseu.has_slice_pg));
seq_printf(m, " Has Subslice Power Gating: %s\n",
- yesno(INTEL_INFO(dev_priv)->has_subslice_pg));
+ yesno(INTEL_INFO(dev_priv)->sseu.has_subslice_pg));
seq_printf(m, " Has EU Power Gating: %s\n",
- yesno(INTEL_INFO(dev_priv)->has_eu_pg));
+ yesno(INTEL_INFO(dev_priv)->sseu.has_eu_pg));
seq_puts(m, "SSEU Device Status\n");
memset(&sseu, 0, sizeof(sseu));