| commit | 3e2db036c9b706e68016db7610c333ed926425be | [log] [tgz] |
|---|---|---|
| author | Sakari Ailus <sakari.ailus@linux.intel.com> | Tue Aug 25 22:23:43 2020 +0200 |
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | Mon Dec 07 15:59:10 2020 +0100 |
| tree | 51b07ca992dd5d68a168a80df079115717926805 | |
| parent | 8030aa4f9c512ecf8b91b37c88ab6b479e71c8a4 [diff] |
media: ccs-pll: Split off VT subtree calculation Split off the VT sub clock tree calculation from the rest, into its own function. Also call the op_pll_fr argument pll_fr, since soon these may not be OP tree values. This paves way for additional features in the future such as dual PLL support. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>