commit | 3ac7831314eba873d60b58718123c503f6961337 | [log] [tgz] |
---|---|---|
author | Jesse Barnes <jbarnes@virtuousgeek.org> | Thu Oct 25 12:15:47 2012 -0700 |
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Sun Nov 11 23:51:37 2012 +0100 |
tree | 62e2042a11d641e20ff782f1cce19623c165d96f | |
parent | 9a28977181724ebbd9bdc45291cf29da55a729ee [diff] |
drm/i915: PIPE_CONTROL TLB invalidate requires CS stall "If ENABLED, PIPE_CONTROL command will flush the in flight data written out by render engine to Global Observation point on flush done. Also Requires stall bit ([20] of DW1) set." So set the stall bit to ensure proper invalidation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Antti Koskipää <antti.koskipaa@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>