| commit | 352546805a44871b68affea09a2fbd5a48e452d0 | [log] [tgz] |
|---|---|---|
| author | Rajan Vaja <rajan.vaja@xilinx.com> | Wed Dec 04 22:35:54 2019 -0800 |
| committer | Stephen Boyd <sboyd@kernel.org> | Thu Jan 23 13:21:50 2020 -0800 |
| tree | d70f29f0e6aa2c4ef1491d611eae0ad3ba91c528 | |
| parent | e42617b825f8073569da76dc4510bfa019b1c35a [diff] |
dt-bindings: clock: Add bindings for versal clock driver Add documentation to describe Xilinx Versal clock driver bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>