| commit | 342e53bd8548e07c6a734d2d3a6437ad6e6d3b09 | [log] [tgz] |
|---|---|---|
| author | Will Deacon <will.deacon@arm.com> | Fri Oct 05 13:28:07 2018 +0100 |
| committer | Will Deacon <will.deacon@arm.com> | Wed Nov 21 13:16:33 2018 +0000 |
| tree | afafbc66fd14730b6713497135d23b2198dfc71f | |
| parent | d3adeed7289220fdc78ee4400efbcd4cf1556215 [diff] |
arm64: perf: Add support for Armv8.1 PMCEID register format Armv8.1 allocated the upper 32-bits of the PMCEID registers to describe the common architectural and microarchitecture events beginning at 0x4000. Add support for these registers to our probing code, so that we can advertise the SPE events when they are supported by the CPU. Signed-off-by: Will Deacon <will.deacon@arm.com>