| commit | 311531f08793931781c74a12082c9a3f8fbfd9ea | [log] [tgz] |
|---|---|---|
| author | Wenhui Sheng <Wenhui.Sheng@amd.com> | Mon Jul 13 15:15:11 2020 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Wed Jul 15 12:41:54 2020 -0400 |
| tree | f9f0251562be8eebe89be6c9f3f9a7c9b4b28061 | |
| parent | bb5c7235eaafb4e2f957e9f0f71a187db5cf525a [diff] |
drm/amdgpu: enable mode1 reset For sienna cichlid, add mode1 reset path for sGPU. v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1 v3: split emergency restart logic to a new patch Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>