| commit | 2570d4005d475818711c96e83fb84d5048ab8e1b | [log] [tgz] |
|---|---|---|
| author | Geert Uytterhoeven <geert+renesas@glider.be> | Mon Jun 27 16:48:07 2016 +0200 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Tue Aug 09 09:53:47 2016 +0200 |
| tree | 068f42396cd32eb980fcbf94afc8a5ea5275d8d0 | |
| parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc [diff] |
clk: renesas: r8a7796: Add watchdog core clocks Add all core clocks related to the Watchdog Timer (WDT) controller on the Renesas R-Car M3-W (r8a7796) SoC: OSC, Internal RCLK, and RCLK. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>