tree add1a7795fd5120d17cef078e1d457199e5e3608
parent bce38cd53e5ddba9cb6d708c4ef3d04a4016ec7e
author Stephane Eranian <eranian@google.com> 1328826052 +0100
committer Ingo Molnar <mingo@elte.hu> 1330955739 +0100

perf/x86: Add Intel LBR MSR definitions

This patch adds the LBR definitions for NHM/WSM/SNB and Core.
It also adds the definitions for the architected LBR MSR:
LBR_SELECT, LBRT_TOS.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-3-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>