| commit | 1cd9028027c7a7c10b774df698c3cfafec6aa67d | [log] [tgz] |
|---|---|---|
| author | Geert Uytterhoeven <geert+renesas@glider.be> | Mon Apr 03 11:45:43 2017 +0200 |
| committer | Simon Horman <horms+renesas@verge.net.au> | Mon Apr 03 06:32:54 2017 -0400 |
| tree | 2c5e4dcde7176ae285741ce82bedb4a3673b642e | |
| parent | 16fe68dcab5702a024d85229ff7e98979cb701a5 [diff] |
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: 072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>