tree 15c11b35ac432d8194e457acc10d5831f3523dc5
parent 2f2a121aba7652608bbe84574241e799cad35a73
author Ville Syrjälä <ville.syrjala@linux.intel.com> 1463172086 +0300
committer Ville Syrjälä <ville.syrjala@linux.intel.com> 1464027072 +0300

drm/i915: Allow enable/disable of DPLL0 around cdclk changes on SKL

In case we originally guessed wrong which lcpll vco frequency to use,
we will need to shut down the pll and restart it when reprogamming the
cdclk.

This also allows us to track the actual vco frequency in dev_priv
instead of just a guess.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-8-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>