powerpc/xics: Reduce and comment xics IPI use of memory barriers

A single full sync (mb()) is requrired to order the mmio to the qirr reg
with the set or clear of the message word.  However, test_and_clear_bit
has the effect of smp_mb() and we are not doing any other io from here,
so we don't need a mb per bit processed.

Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
1 file changed