| commit | 1660710cf5d8d44ec351a5df57c35516f1fbf5e0 | [log] [tgz] |
|---|---|---|
| author | Paul Cercueil <paul@crapouillou.net> | Sun May 30 18:17:55 2021 +0100 |
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | Tue Jun 01 11:44:46 2021 +0200 |
| tree | 591624fadbf915c66cef78f5afc7d5c35ae4833c | |
| parent | c8ba52d1b7e317c54d461970e4bdeec10ea1d9c4 [diff] |
MIPS: mm: XBurst CPU requires sync after DMA I am not sure why this is required, but if this is not enabled, reading from a buffer in which data has been DMA'd may read incorrect values. This used to happen for instance in mmc_app_send_scr() (drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied by the CPU to a different location. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>