commit | 161450134ae9bab3778c5f5732941162626d0eaa | [log] [tgz] |
---|---|---|
author | Biju Das <biju.das.jz@bp.renesas.com> | Wed Nov 10 08:20:19 2021 +0000 |
committer | Geert Uytterhoeven <geert+renesas@glider.be> | Mon Nov 15 10:47:18 2021 +0100 |
tree | 917ee5f5ecdeaa3c9f8e76d876d0bd0f8201b37b | |
parent | dc446cba4301bbe2dbe16711091635d987626410 [diff] |
clk: renesas: r9a07g044: Add OSTM clock and reset entries Add OSTM{0,1,2} clock and reset entries to CPG driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211110082019.28554-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>