| commit | 10d9ea5100c89afd677a202036e0e34e129a6c52 | [log] [tgz] |
|---|---|---|
| author | Simon Horman <horms+renesas@verge.net.au> | Mon Mar 25 17:35:51 2019 +0100 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Tue Apr 02 09:50:48 2019 +0200 |
| tree | 8d2e6c4f2701568ac3b13048556dc89989a4be26 | |
| parent | 20cc05ba04a93f05d6c50789fe35d762a2db4e96 [diff] |
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset Parameterise the offset of control bits within the FRQCRC register for Z and Z2 clocks. This is in preparation for supporting the Z2 clock on the R-Car E3 (r8a77990) SoC which uses a different offset for control bits to other, already, supported SoCs. As suggested by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>