| commit | 0ecc471a2cb7d4d386089445a727f47b59dc9b6e | [log] [tgz] |
|---|---|---|
| author | Hanjun Guo <hanjun.guo@linaro.org> | Tue Mar 05 21:40:58 2019 +0800 |
| committer | Catalin Marinas <catalin.marinas@arm.com> | Tue Mar 19 14:55:10 2019 +0000 |
| tree | edda8a42707c96a82cc21b4d2ff06b7e622abae9 | |
| parent | efd00c722ca855745fcc35a7e6675b5a782a3fc8 [diff] |
arm64: kpti: Whitelist HiSilicon Taishan v110 CPUs HiSilicon Taishan v110 CPUs didn't implement CSV3 field of the ID_AA64PFR0_EL1 and are not susceptible to Meltdown, so whitelist the MIDR in kpti_safe_list[] table. Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by: John Garry <john.garry@huawei.com> Reviewed-by: Zhangshaokun <zhangshaokun@hisilicon.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>