| commit | 0e5f61b00c577da698fb00cd9c91a96b79044dfd | [log] [tgz] |
|---|---|---|
| author | Andi Kleen <ak@suse.de> | Sat Jul 29 21:42:37 2006 +0200 |
| committer | Linus Torvalds <torvalds@g5.osdl.org> | Sat Jul 29 20:59:55 2006 -0700 |
| tree | de9e4c79ff38247988859e41350212b41fe882df | |
| parent | 260f659b232b17889e3f0c9bf411675898b222c2 [diff] |
[PATCH] x86_64: On Intel systems when CPU has C3 don't use TSC On Intel systems generally the TSC stops in C3 or deeper, so don't use it there. Follows similar logic on i386. This should fix problems on Meroms. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>