[ARM] pxa: introduce reset_status and clear_reset_status for driver's usage
Due to the problem of reset status bits being handled by different
registers between pxa2xx and pxa3xx, introduce a global reset_status
variable, initialized by SoC-specific code and later being used by
other drivers.
And also introduce clear_reset_status(), which is used to clear the
corresponding status bits. Pass RESET_STATUS_ALL to clear all bits.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index ca05322..3663892 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -26,9 +26,19 @@
#include <asm/mach/map.h>
#include <asm/arch/pxa-regs.h>
+#include <asm/arch/reset.h>
#include "generic.h"
+void clear_reset_status(unsigned int mask)
+{
+ if (cpu_is_pxa2xx())
+ pxa2xx_clear_reset_status(mask);
+
+ if (cpu_is_pxa3xx())
+ pxa3xx_clear_reset_status(mask);
+}
+
/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 5bb7ae7..041c04832 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -47,12 +47,20 @@
#define pxa27x_get_memclk_frequency_10khz() (0)
#endif
+#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
+extern void pxa2xx_clear_reset_status(unsigned int);
+#else
+static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
+#endif
+
#ifdef CONFIG_PXA3xx
extern unsigned pxa3xx_get_clk_frequency_khz(int);
extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
+extern void pxa3xx_clear_reset_status(unsigned int);
#else
#define pxa3xx_get_clk_frequency_khz(x) (0)
#define pxa3xx_get_memclk_frequency_10khz() (0)
+static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
#endif
extern struct sysdev_class pxa_irq_sysclass;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index c5b845b..49a7a29 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -28,6 +28,7 @@
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/reset.h>
#include <asm/arch/pm.h>
#include <asm/arch/dma.h>
@@ -348,6 +349,9 @@
clks_register(&pxa25x_hwuart_clk, 1);
if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
+
+ reset_status = RCSR;
+
clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
if ((ret = pxa_init_dma(16)))
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d5d14ea..a8c1234 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -24,6 +24,7 @@
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/reset.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pm.h>
#include <asm/arch/dma.h>
@@ -384,6 +385,9 @@
int i, ret = 0;
if (cpu_is_pxa27x()) {
+
+ reset_status = RCSR;
+
clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
if ((ret = pxa_init_dma(32)))
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index d4f6415..d93d3e6 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -14,10 +14,19 @@
#include <linux/kernel.h>
#include <linux/device.h>
+#include <asm/hardware.h>
+#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/mfp-pxa2xx.h>
#include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/reset.h>
#include <asm/arch/irda.h>
+void pxa2xx_clear_reset_status(unsigned int mask)
+{
+ /* RESET_STATUS_* has a 1:1 mapping with RCSR */
+ RCSR = mask;
+}
+
static unsigned long pxa2xx_mfp_fir[] = {
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f491025..3d36c79 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -24,6 +24,7 @@
#include <asm/hardware.h>
#include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/reset.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pm.h>
#include <asm/arch/dma.h>
@@ -109,6 +110,12 @@
return (clk / 10000);
}
+void pxa3xx_clear_reset_status(unsigned int mask)
+{
+ /* RESET_STATUS_* has a 1:1 mapping with ARSR */
+ ARSR = mask;
+}
+
/*
* Return the current AC97 clock frequency.
*/
@@ -532,6 +539,9 @@
int i, ret = 0;
if (cpu_is_pxa3xx()) {
+
+ reset_status = ARSR;
+
/*
* clear RDH bit every time after reset
*
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index d610a12..56f60d9 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -11,9 +11,11 @@
#include <asm/proc-fns.h>
#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/reset.h>
+unsigned int reset_status;
+EXPORT_SYMBOL(reset_status);
+
static void do_hw_reset(void);
static int reset_gpio = -1;
@@ -78,8 +80,7 @@
void arch_reset(char mode)
{
- if (cpu_is_pxa2xx())
- RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+ clear_reset_status(RESET_STATUS_ALL);
switch (mode) {
case 's':
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 0c2fa1c..3b6fc09 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -31,6 +31,9 @@
#include "generic.h"
+unsigned int reset_status;
+EXPORT_SYMBOL(reset_status);
+
#define NR_FREQS 16
/*