Merge tag 'sh-pfc-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v5.9
- Add RPC (HyperFlash and Octal-SPI Flash) pin groups on R-Car V3H and
V3M.
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 26a531e..734f0be 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -442,6 +442,7 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk;
+ const char *label;
int i;
out = readl_relaxed(GPIO_OUT(ochip));
@@ -453,15 +454,10 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
edg_msk = readl_relaxed(GPIO_EDGE_MASK(ochip));
lvl_msk = readl_relaxed(GPIO_LEVEL_MASK(ochip));
- for (i = 0; i < chip->ngpio; i++) {
- const char *label;
+ for_each_requested_gpio(chip, i, label) {
u32 msk;
bool is_out;
- label = gpiochip_is_requested(chip, i);
- if (!label)
- continue;
-
msk = 1 << i;
is_out = !(io_conf & msk);
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index bd65114..433e2c3 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -846,6 +846,7 @@ static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);
u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk;
+ const char *label;
int i;
regmap_read(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, &out);
@@ -857,15 +858,10 @@ static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
edg_msk = mvebu_gpio_read_edge_mask(mvchip);
lvl_msk = mvebu_gpio_read_level_mask(mvchip);
- for (i = 0; i < chip->ngpio; i++) {
- const char *label;
+ for_each_requested_gpio(chip, i, label) {
u32 msk;
bool is_out;
- label = gpiochip_is_requested(chip, i);
- if (!label)
- continue;
-
msk = BIT(i);
is_out = !(io_conf & msk);
diff --git a/drivers/gpio/gpio-xra1403.c b/drivers/gpio/gpio-xra1403.c
index 31b5072..e2cac12 100644
--- a/drivers/gpio/gpio-xra1403.c
+++ b/drivers/gpio/gpio-xra1403.c
@@ -121,6 +121,7 @@ static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
struct xra1403 *xra = gpiochip_get_data(chip);
int value[XRA_LAST];
int i;
+ const char *label;
unsigned int gcr;
unsigned int gsr;
@@ -136,12 +137,7 @@ static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
- for (i = 0; i < chip->ngpio; i++) {
- const char *label = gpiochip_is_requested(chip, i);
-
- if (!label)
- continue;
-
+ for_each_requested_gpio(chip, i, label) {
seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
chip->base + i, label,
(gcr & BIT(i)) ? "in" : "out",
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 52386ad..9c52130 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1486,14 +1486,11 @@ static void at91_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
int i;
struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip);
void __iomem *pio = at91_gpio->regbase;
+ const char *gpio_label;
- for (i = 0; i < chip->ngpio; i++) {
+ for_each_requested_gpio(chip, i, gpio_label) {
unsigned mask = pin_to_mask(i);
- const char *gpio_label;
- gpio_label = gpiochip_is_requested(chip, i);
- if (!gpio_label)
- continue;
mode = at91_gpio->ops->get_periph(pio, mask);
seq_printf(s, "[%s] GPIO%s%d: ",
gpio_label, chip->label, i);
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
index 6a8d445..fc0d104 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -124,6 +124,7 @@ static int jz4740_nand_cs1_pins[] = { 0x39, };
static int jz4740_nand_cs2_pins[] = { 0x3a, };
static int jz4740_nand_cs3_pins[] = { 0x3b, };
static int jz4740_nand_cs4_pins[] = { 0x3c, };
+static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
static int jz4740_pwm_pwm0_pins[] = { 0x77, };
static int jz4740_pwm_pwm1_pins[] = { 0x78, };
static int jz4740_pwm_pwm2_pins[] = { 0x79, };
@@ -146,6 +147,7 @@ static int jz4740_nand_cs1_funcs[] = { 0, };
static int jz4740_nand_cs2_funcs[] = { 0, };
static int jz4740_nand_cs3_funcs[] = { 0, };
static int jz4740_nand_cs4_funcs[] = { 0, };
+static int jz4740_nand_fre_fwe_funcs[] = { 0, 0, };
static int jz4740_pwm_pwm0_funcs[] = { 0, };
static int jz4740_pwm_pwm1_funcs[] = { 0, };
static int jz4740_pwm_pwm2_funcs[] = { 0, };
@@ -178,6 +180,7 @@ static const struct group_desc jz4740_groups[] = {
INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2),
INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3),
INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4),
+ INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe),
INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0),
INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1),
INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2),
@@ -195,7 +198,7 @@ static const char *jz4740_lcd_groups[] = {
"lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-18bit-tft", "lcd-no-pins",
};
static const char *jz4740_nand_groups[] = {
- "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4",
+ "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe",
};
static const char *jz4740_pwm0_groups[] = { "pwm0", };
static const char *jz4740_pwm1_groups[] = { "pwm1", };
@@ -2292,6 +2295,7 @@ static const struct regmap_config ingenic_pinctrl_regmap_config = {
static const struct of_device_id ingenic_gpio_of_match[] __initconst = {
{ .compatible = "ingenic,jz4740-gpio", },
+ { .compatible = "ingenic,jz4725b-gpio", },
{ .compatible = "ingenic,jz4760-gpio", },
{ .compatible = "ingenic,jz4770-gpio", },
{ .compatible = "ingenic,jz4780-gpio", },
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 1e0614d..a9d5119 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -916,7 +916,7 @@ static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
/* If pinconf isn't supported, don't parse properties in below. */
if (!PCS_HAS_PINCONF)
- return 0;
+ return -ENOTSUPP;
/* cacluate how much properties are supported in current node */
for (i = 0; i < ARRAY_SIZE(prop2); i++) {
@@ -928,7 +928,7 @@ static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
nconfs++;
}
if (!nconfs)
- return 0;
+ return -ENOTSUPP;
func->conf = devm_kcalloc(pcs->dev,
nconfs, sizeof(struct pcs_conf_vals),
@@ -1056,9 +1056,12 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
if (PCS_HAS_PINCONF && function) {
res = pcs_parse_pinconf(pcs, np, function, map);
- if (res)
+ if (res == 0)
+ *num_maps = 2;
+ else if (res == -ENOTSUPP)
+ *num_maps = 1;
+ else
goto free_pingroups;
- *num_maps = 2;
} else {
*num_maps = 1;
}
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index a657cd8..faf2660 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -84,6 +84,7 @@ struct stm32_pinctrl_group {
struct stm32_gpio_bank {
void __iomem *base;
struct clk *clk;
+ struct reset_control *rstc;
spinlock_t lock;
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range range;
@@ -302,6 +303,7 @@ static const struct gpio_chip stm32_gpio_template = {
.direction_output = stm32_gpio_direction_output,
.to_irq = stm32_gpio_to_irq,
.get_direction = stm32_gpio_get_direction,
+ .set_config = gpiochip_generic_config,
};
static void stm32_gpio_irq_trigger(struct irq_data *d)
@@ -1051,7 +1053,7 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
struct stm32_gpio_bank *bank;
int offset, ret = 0;
- range = pinctrl_find_gpio_range_from_pin(pctldev, pin);
+ range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
if (!range) {
dev_err(pctl->dev, "No gpio range defined.\n");
return -EINVAL;
@@ -1084,7 +1086,7 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
ret = stm32_pmx_gpio_set_direction(pctldev, range, pin, false);
break;
default:
- ret = -EINVAL;
+ ret = -ENOTSUPP;
}
return ret;
@@ -1109,9 +1111,11 @@ static int stm32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
int i, ret;
for (i = 0; i < num_configs; i++) {
+ mutex_lock(&pctldev->mutex);
ret = stm32_pconf_parse_conf(pctldev, g->pin,
pinconf_to_config_param(configs[i]),
pinconf_to_config_argument(configs[i]));
+ mutex_unlock(&pctldev->mutex);
if (ret < 0)
return ret;
@@ -1121,6 +1125,22 @@ static int stm32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
return 0;
}
+static int stm32_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *configs, unsigned int num_configs)
+{
+ int i, ret;
+
+ for (i = 0; i < num_configs; i++) {
+ ret = stm32_pconf_parse_conf(pctldev, pin,
+ pinconf_to_config_param(configs[i]),
+ pinconf_to_config_argument(configs[i]));
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s,
unsigned int pin)
@@ -1186,10 +1206,10 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
}
}
-
static const struct pinconf_ops stm32_pconf_ops = {
.pin_config_group_get = stm32_pconf_group_get,
.pin_config_group_set = stm32_pconf_group_set,
+ .pin_config_set = stm32_pconf_set,
.pin_config_dbg_show = stm32_pconf_dbg_show,
};
@@ -1202,13 +1222,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
struct of_phandle_args args;
struct device *dev = pctl->dev;
struct resource res;
- struct reset_control *rstc;
int npins = STM32_GPIO_PINS_PER_BANK;
int bank_nr, err;
- rstc = of_reset_control_get_exclusive(np, NULL);
- if (!IS_ERR(rstc))
- reset_control_deassert(rstc);
+ if (!IS_ERR(bank->rstc))
+ reset_control_deassert(bank->rstc);
if (of_address_to_resource(np, 0, &res))
return -ENODEV;
@@ -1217,12 +1235,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
if (IS_ERR(bank->base))
return PTR_ERR(bank->base);
- bank->clk = of_clk_get_by_name(np, NULL);
- if (IS_ERR(bank->clk)) {
- dev_err(dev, "failed to get clk (%ld)\n", PTR_ERR(bank->clk));
- return PTR_ERR(bank->clk);
- }
-
err = clk_prepare(bank->clk);
if (err) {
dev_err(dev, "failed to prepare clk (%d)\n", err);
@@ -1517,6 +1529,28 @@ int stm32_pctl_probe(struct platform_device *pdev)
if (!pctl->banks)
return -ENOMEM;
+ i = 0;
+ for_each_available_child_of_node(np, child) {
+ struct stm32_gpio_bank *bank = &pctl->banks[i];
+
+ if (of_property_read_bool(child, "gpio-controller")) {
+ bank->rstc = of_reset_control_get_exclusive(child,
+ NULL);
+ if (PTR_ERR(bank->rstc) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
+ bank->clk = of_clk_get_by_name(child, NULL);
+ if (IS_ERR(bank->clk)) {
+ if (PTR_ERR(bank->clk) != -EPROBE_DEFER)
+ dev_err(dev,
+ "failed to get clk (%ld)\n",
+ PTR_ERR(bank->clk));
+ return PTR_ERR(bank->clk);
+ }
+ i++;
+ }
+ }
+
for_each_available_child_of_node(np, child) {
if (of_property_read_bool(child, "gpio-controller")) {
ret = stm32_gpiolib_register_bank(pctl, child);
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index c4f272a..11cdcb1 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -474,6 +474,22 @@ struct gpio_chip {
extern const char *gpiochip_is_requested(struct gpio_chip *gc,
unsigned int offset);
+/**
+ * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
+ * @chip: the chip to query
+ * @i: loop variable
+ * @base: first GPIO in the range
+ * @size: amount of GPIOs to check starting from @base
+ * @label: label of current GPIO
+ */
+#define for_each_requested_gpio_in_range(chip, i, base, size, label) \
+ for (i = 0; i < size; i++) \
+ if ((label = gpiochip_is_requested(chip, base + i)) == NULL) {} else
+
+/* Iterates over all requested GPIO of the given @chip */
+#define for_each_requested_gpio(chip, i, label) \
+ for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
+
/* add/remove chips */
extern int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
struct lock_class_key *lock_key,