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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 7592019634f8473f0b0973ce79297183077bdbc2 / drivers / clk / clk-aspeed.c
  1. 8a53fc5 clk: aspeed: Prevent reset if clock is enabled by Eddie James · 7 years ago
  2. d90c76b clk: aspeed: Fix is_enabled for certain clocks by Eddie James · 7 years ago
  3. 6671507 clk: aspeed: Handle inverse polarity of USB port 1 clock gate by Benjamin Herrenschmidt · 7 years ago
  4. accf475 clk: aspeed: Fix return value check in aspeed_cc_init() by Wei Yongjun · 7 years ago
  5. f798983 clk: aspeed: Add reset controller by Joel Stanley · 7 years ago
  6. 15ed8ce5 clk: aspeed: Register gated clocks by Joel Stanley · 7 years ago
  7. 98f3118 clk: aspeed: Add platform driver and register PLLs by Joel Stanley · 7 years ago
  8. 99d01e0 clk: aspeed: Register core clocks by Joel Stanley · 7 years ago
  9. 5eda5d7 clk: Add clock driver for ASPEED BMC SoCs by Joel Stanley · 7 years ago