Gitiles
Code Review Sign In
review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 50af501cd84b4e005fd54c351184ec89cfc940e4 / arch / mips / include / asm / mipsregs.h
  1. 50af501 MIPS: Add and use watch register field definitions by James Hogan · 9 years ago
  2. e233c73 MIPS: Add and use CAUSEF_WP definition by James Hogan · 9 years ago
  3. f270d88 MIPS: Detect MIPSr6 Virtual Processor support by Paul Burton · 9 years ago
  4. 044c9bb MIPS: Update trap codes by James Hogan · 9 years ago
  5. 16d100db MIPS: Move Cause.ExcCode trap codes to mipsregs.h by James Hogan · 9 years ago
  6. 9fd4af6 MIPS: Move definition of DC bit to mipsregs.h by James Hogan · 9 years ago
  7. c6956728 MIPS: Tidy EntryLo bit definitions, add PFN by Paul Burton · 9 years ago
  8. 609cf6f MIPS: CPS: Early debug using an ns16550-compatible UART by Paul Burton · 9 years ago
  9. 195cee9 MIPS: Fix duplicate CP0_* definitions. by James Hogan · 9 years ago
  10. 2f6f313 MIPS: cpu-features: Add cpu_has_ftlb by James Hogan · 9 years ago
  11. bae637a MIPS: Rearrange ENTRYLO field definitions by James Hogan · 9 years ago
  12. c46a2f0 MIPS: Treat CP1 control registers as unsigned ints. by Ralf Baechle · 9 years ago
  13. 82eb8f7 MIPS: Use unsigned int when reading CP0 registers by Chris Packham · 9 years ago
  14. 20a7f7e MIPS: Set up FTLB probability for I6400 by Markos Chandras · 10 years ago
  15. 8d5ded1 MIPS: R12000: Enable branch prediction global history by Joshua Kinard · 10 years ago
  16. 8ab6abc MIPS: mipsregs.h: Add EntryLo bit definitions by James Hogan · 10 years ago
  17. f1f3b7e MIPS: math-emu: Define IEEE 754-2008 feature control bits by Maciej W. Rozycki · 10 years ago
  18. c491cfa MIPS: math-emu: Implement the FCCR, FEXR and FENR registers by Maciej W. Rozycki · 10 years ago
  19. 1054533 MIPS: mipsregs.h: Reindent CP0 Cause macros by Maciej W. Rozycki · 10 years ago
  20. e08384c MIPS: mipsregs.h: Move TX39 macros out of the way by Maciej W. Rozycki · 10 years ago
  21. fda5190 MIPS: mipsregs.h: Reorder CP1 macro definitions by Maciej W. Rozycki · 10 years ago
  22. 124f43d MIPS: mipsregs.h: Remove broken comments by Maciej W. Rozycki · 10 years ago
  23. 9323f84 MIPS: Add architectural FDC IRQ fields by James Hogan · 10 years ago
  24. 9b3274b MIPS: Add arch CDMM definitions and probing by James Hogan · 10 years ago
  25. a135c71 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus by Linus Torvalds · 10 years ago
  26. a5770df MIPS: Add set/clear CP0 macros for PageGrain register by Steven J. Hill · 10 years ago
  27. b55b9e2 MIPS: asm: mipsregs: Add support for the LLADDR register by Markos Chandras · 10 years ago
  28. 5aed9da MIPS: Add LLB bit and related feature for the Config 5 CP0 register by Markos Chandras · 10 years ago
  29. 5e32033 MIPS: mipsregs.h: Add write_32bit_cp1_register() by James Hogan · 10 years ago
  30. c0222ac0 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus by Linus Torvalds · 10 years ago
  31. 23d06e4 MIPS: Add CP0 macros for extended EntryLo registers by Steven J. Hill · 10 years ago
  32. 5ff04a8 MIPS: define bits introduced for hybrid FPRs by Paul Burton · 10 years ago
  33. cf0a8aa MIPS: cpu-probe: Set the FTLB probability bit on supported cores by Markos Chandras · 10 years ago
  34. 842dfc1 MIPS: Fix build with binutils 2.24.51+ by Manuel Lauss · 10 years ago
  35. 0d6b614 MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT by Dan Carpenter · 11 years ago
  36. e19d5db MIPS: define MAAR register accessors & bits by Paul Burton · 10 years ago
  37. 6575b1d MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions by Leonid Yegoshin · 10 years ago
  38. 87d08bc MIPS: asm: Add register definitions for Hardware Table Walker by Markos Chandras · 10 years ago
  39. 45b585c MIPS: Add function get_ebase_cpunum by David Daney · 11 years ago
  40. b633648 MIPS: MT: Remove SMTC support by Ralf Baechle · 11 years ago
  41. 377cb1b MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs. by Ralf Baechle · 11 years ago
  42. 7f65afb MIPS: Add MSA register definitions & access by Paul Burton · 11 years ago
  43. 4dd8ee5 MIPS: Add CP0 CMGCRBase definitions & accessor by Paul Burton · 11 years ago
  44. 20a8d5d MIPS: Define Config1 cache field shifts & sizes by Paul Burton · 11 years ago
  45. 02dc6bf MIPS: mm: c-r4k: Detect instruction cache aliases by Markos Chandras · 11 years ago
  46. 87c9920 MIPS: include linux/types.h by Qais Yousef · 11 years ago
  47. 75b5b5e MIPS: Add support for FTLBs by Leonid Yegoshin · 11 years ago
  48. 198bb4c MIPS: Add function for flushing the TLB using the TLBINV instruction by Leonid Yegoshin · 11 years ago
  49. 4a0156f MIPS: features: Add initial support for Segmentation Control registers by Steven J. Hill · 11 years ago
  50. 691038ba MIPS: Add missing bits for Config registers by Leonid Yegoshin · 11 years ago
  51. 2f9ee82 MIPS: Add MIPS R5 config5 register. by Ralf Baechle · 11 years ago
  52. c6213c6 MIPS: microMIPS: Fix improper definition of ISA exception bit. by Steven J. Hill · 12 years ago
  53. 2a0b24f MIPS: microMIPS: Add support for exception handling. by Steven J. Hill · 12 years ago
  54. bfd08ba MIPS: microMIPS: Add instruction utility macros. by Steven J. Hill · 12 years ago
  55. 63c2b68 MIPS: Fix code generation for non-DSP capable CPUs by Florian Fainelli · 12 years ago
  56. 8bfc245 Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next by Ralf Baechle · 12 years ago
  57. 1e7decd MIPS: Probe for and report hardware virtualization support. by David Daney · 12 years ago
  58. 4cb764b MIPS: dsp: Simplify the DSP macros. by Steven J. Hill · 12 years ago
  59. d0c1b47 MIPS: dsp: Support toolchains without DSP ASE and microMIPS. by Steven J. Hill · 12 years ago
  60. 32a7ede MIPS: dsp: Add assembler support for DSP ASEs. by Steven J. Hill · 12 years ago
  61. f8fa481 MIPS: Add support for the M14KEc core. by Steven J. Hill · 12 years ago
  62. 7034228 MIPS: Whitespace cleanup. by Ralf Baechle · 12 years ago
  63. b968831 MIPS: Whitespace cleanups and reformatting. by Steven J. Hill · 12 years ago
  64. bdf2050 MIPS: PMC-Sierra Yosemite: Remove support. by Ralf Baechle · 12 years ago
  65. aa1762f MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORT by David Daney · 12 years ago
  66. ee80f7c7 MIPS: Add detection of DSP ASE Revision 2. by Steven J. Hill · 12 years ago
  67. da4b62c MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt) by Al Cooper · 13 years ago
  68. cb418b3 Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next by Ralf Baechle · 12 years ago
  69. b2ab4f0 MIPS: Add base architecture support for RI and XI. by Steven J. Hill · 12 years ago
  70. 006a851 MIPS: Add support for the 1074K core. by Steven J. Hill · 13 years ago
  71. 020232f MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations by Kevin Cernekee · 13 years ago
  72. 4d36f59 MIPS: Add accessor macros for 64-bit performance counter registers. by David Daney · 13 years ago
  73. 25985ed Fix common misspellings by Lucas De Marchi · 14 years ago
  74. af23117 MIPS: Add BMIPS CP0 register definitions by Kevin Cernekee · 14 years ago
  75. 96ffa02 MIPS: Define ST0_NMI in asm/mipsregs.h by David Daney · 14 years ago
  76. 95e8f63 MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 by Shane McDonald · 15 years ago
  77. 9fe2e9d MIPS: Add accessor functions and bit definitions for c0_PageGrain by David Daney · 15 years ago
  78. 1b362e3 MIPS: Decode c0_config4 for large TLBs. by David Daney · 15 years ago
  79. 010c108 MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs by David VomLehn · 15 years ago
  80. dd79439 MIPS: Add hugetlbfs page defines. by David Daney · 16 years ago
  81. 0b54352 MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware. by Ralf Baechle · 16 years ago
  82. c52399b MIPS: Cavium: Add support for 8k and 32k page sizes. by Ralf Baechle · 16 years ago
  83. c34e6e8 MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate. by Kevin D. Kissell · 16 years ago
  84. 89e18eb MIPS: Change {set,clear,change}_c0_<foo> to return old value. by Ralf Baechle · 16 years ago
  85. 25c3000 MIPS: Override assembler target architecture for octeon. by David Daney · 16 years ago
  86. ed918c2 MIPS: Add Cavium OCTEON specific register definitions to mipsregs.h by David Daney · 16 years ago
  87. 542c102 MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors by Shinya Kuribayashi · 16 years ago
  88. 384740d MIPS: Move headfiles to new location below arch/mips/include by Ralf Baechle · 16 years ago[Renamed from include/asm-mips/mipsregs.h]
  89. b7e4226 [MIPS] Build fix: Fix irq flags type by Ralf Baechle · 16 years ago
  90. 272bace [MIPS] Add accessors for random register. by Ralf Baechle · 17 years ago
  91. 21a151d [MIPS] checkfiles: Fix "need space after that ','" errors. by Ralf Baechle · 17 years ago
  92. 87d43dd [MIPS] Change names of local variables to silence sparse (part 2) by Atsushi Nemoto · 18 years ago
  93. 9267a30 [MIPS] PMC MSP71xx mips common by Marc St-Jean · 18 years ago
  94. a369202 [MIPS] Enable support for the userlocal hardware register by Ralf Baechle · 18 years ago
  95. 4b3e975 [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores by Ralf Baechle · 18 years ago
  96. 2472d0b [MIPS] Remove unused R10000 performance counter definitions. by Ralf Baechle · 18 years ago
  97. 2874fe5 [MIPS] vr41xx: Replace magic number for P4K bit with symbol. by Yoichi Yuasa · 19 years ago
  98. 192ef36 [MIPS] TRACE_IRQFLAGS_SUPPORT support. by Ralf Baechle · 19 years ago
  99. 4e8ab36 [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. by Yoichi Yuasa · 19 years ago
  100. 4277ff5 [MIPS] Fix use of ehb instruction for non-R2 configurations. by Ralf Baechle · 19 years ago