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1b21401307a6a705688faf1bc9e6e02663708ec1
1b21401
clk: spear: fix ADC clock definition on SPEAr600
by Thomas Petazzoni
· 8 years ago
96596aa
clk: mediatek: add clk support for MT6797
by Kevin-CW Chen
· 8 years ago
2b51f51
dt-bindings: arm: mediatek: document clk bindings for MT6797
by Kevin-CW Chen
· 8 years ago
ddc3443
Merge branch 'clk-mt6797' into clk-next
by Stephen Boyd
· 8 years ago
df0225a
clk: mediatek: add mt6797 clock IDs
by Mars Cheng
· 8 years ago
40e00ef
clk: imx7d: add the missing ipg_root_clk
by Dong Aisheng
· 8 years ago
9a6e904
clk: clk-imx7d: fix ahb clk definition
by Dong Aisheng
· 8 years ago
1193e14
clk: vc5: Add support for IDT VersaClock 5P49V5935
by Alexey Firago
· 8 years ago
a330b6f
clk: vc5: Add bindings for IDT VersaClock 5P49V5935
by Alexey Firago
· 8 years ago
9adddb0
clk: vc5: Add structure to describe particular chip features
by Alexey Firago
· 8 years ago
8062b4a
Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next
by Stephen Boyd
· 8 years ago
e609f9f
Merge branch 'clk-fixes' into clk-next
by Stephen Boyd
· 8 years ago
e759030
Merge tag 'sunxi-clk-fixes-for-4.11-2-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes
by Stephen Boyd
· 8 years ago
372fa10
clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change
by Chen-Yu Tsai
· 8 years ago
02ae2bc
clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks
by Chen-Yu Tsai
· 8 years ago
e87741a
clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driver
by Tobias Regnery
· 8 years ago
aa01338
clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLER
by Tobias Regnery
· 8 years ago
83dd720
clk: cs2000: use existing priv_to_dev() to getting struct device
by Kuninori Morimoto
· 8 years ago
a507c57
Merge tag 'meson-clk-for-4.12' of git://github.com/BayLibre/clk-meson into clk-next
by Michael Turquette
· 8 years ago
0d7a532
Merge tag 'amlogic-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into clk-next
by Michael Turquette
· 8 years ago
17c34c5
clk: aggregate return codes of notify chains
by Peter De Schrijver
· 8 years ago
9203157
clk: add clk_possible_parents debugfs file
by Peter De Schrijver
· 8 years ago
1905719
clk: imx: correct uart4_serial clock name in driver for i.MX6UL
by Robin van der Gracht
· 8 years ago
15a2a14
clk: zte: Mark pll config tables as const
by Stephen Boyd
· 8 years ago
a90099da3
clk: zte: add pll_vga clock for zx296718
by Shawn Guo
· 8 years ago
ee249cb
clk: zte: pd_bit is not 0 on zx296718
by Shawn Guo
· 8 years ago
5790d80
clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocks
by Shawn Guo
· 8 years ago
cf091ee
clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clock
by Robin van der Gracht
· 8 years ago
72be2d5
Merge tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
by Michael Turquette
· 8 years ago
1f9dfd7
cs-2000-cp: keep Reserved bit on each register
by Kuninori Morimoto
· 8 years ago
a62ca33
clk: qcom: msm8996: Fix the vfe1 powerdomain name
by Rajendra Nayak
· 8 years ago
ac03d8b
clk: stm32f4: fix timeout management for pll and ready gate
by Gabriel Fernandez
· 8 years ago
d5a0945
clk: iproc: Remove redundant check
by Ray Jui
· 8 years ago
5579836
Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
by Michael Turquette
· 8 years ago
0d4ae36
Merge tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
by Michael Turquette
· 8 years ago
f37753e
Merge branch 'clk-fixes' into clk-next
by Stephen Boyd
· 8 years ago
ef18910
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
by Gabriel Fernandez
· 8 years ago
4641d6a
Merge branch 'for-4.12-ti-clk-cleanups' of https://github.com/t-kristo/linux-pm into clk-next
by Stephen Boyd
· 8 years ago
b045949
clk: hi6220: add debug APB clock
by Leo Yan
· 8 years ago
b609338
clk: meson: mpll: use 64bit math in rate_from_params
by Martin Blumenstingl
· 8 years ago
88e4ac6
clk: meson: mpll: fix division by zero in rate_from_params
by Martin Blumenstingl
· 8 years ago
7eaa44f
clk: meson: gxbb: add cts_i958 clock
by Jerome Brunet
· 8 years ago
3c277c2
clk: meson: gxbb: add cts_mclk_i958
by Jerome Brunet
· 8 years ago
4087bd4
clk: meson: gxbb: add cts_amclk
by Jerome Brunet
· 8 years ago
59e8533
clk: meson: add audio clock divider support
by Jerome Brunet
· 8 years ago
a70c6e0
clk: meson: gxbb: protect against holes in the onecell_data array
by Jerome Brunet
· 8 years ago
fd33f3e
MAINTAINERS: Add maintainers for the meson clock driver
by Jerome Brunet
· 8 years ago
cb54596
clk: sunxi-ng: Display index when clock registration fails
by Priit Laes
· 8 years ago
68f37d86
clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor
by Chen-Yu Tsai
· 8 years ago
25eb035
clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks
by Chen-Yu Tsai
· 8 years ago
cf71901
clk: sunxi-ng: mult: Support PLL lock detection
by Chen-Yu Tsai
· 8 years ago
3a42981
Merge branch 'v4.12/clk-drivers' into v4.12/clk
by Kevin Hilman
· 8 years ago
0d48fc5
clk: meson-gxbb: Add GXL/GXM GP0 Variant
by Neil Armstrong
· 8 years ago
e194401c
clk: meson-gxbb: Add GP0 PLL init parameters
by Neil Armstrong
· 8 years ago
45fcbec
clk: meson: Add support for parameters for specific PLLs
by Neil Armstrong
· 8 years ago
fac9a55
clk: meson-gxbb: Add MALI clocks
by Neil Armstrong
· 8 years ago
92c2cc5
dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
by Neil Armstrong
· 8 years ago
7d33d60
clk: meson-gxbb: Expose GP0 dt-bindings clock id
by Neil Armstrong
· 8 years ago
5c65eec
clk: meson-gxbb: Add MALI clock IDS
by Neil Armstrong
· 8 years ago
28f6c58
dt-bindings: clk: gxbb: expose i2s output clock gates
by Jerome Brunet
· 8 years ago
cdb8b80
clk: sunxi-ng: add support for PRCM CCUs
by Icenowy Zheng
· 8 years ago
d4879bd
dt-bindings: update device tree binding for Allwinner PRCM CCUs
by Icenowy Zheng
· 8 years ago
1116d5a
clk: tegra: Don't reset PLL-CX if it is already enabled
by Jon Hunter
· 8 years ago
88da44c
clk: tegra: Add missing Tegra210 clocks
by Peter De Schrijver
· 8 years ago
a63b618
clk: tegra: Propagate clk_out_x rate to parent
by Alex Frid
· 8 years ago
daffad2
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
by Gabriel Fernandez
· 8 years ago
bb19530
clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0
by Geert Uytterhoeven
· 8 years ago
5573d19
clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
by Geert Uytterhoeven
· 8 years ago
89f1b1c
clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
by Geert Uytterhoeven
· 8 years ago
48d0341
clk: renesas: cpg-mssr: Add support for fixing up clock tables
by Geert Uytterhoeven
· 8 years ago
b68fb78
clk: meson: mpll: correct N2 maximum value
by Jerome Brunet
· 8 years ago
b778f74
clk: meson8b: add the mplls clocks 0, 1 and 2
by Jerome Brunet
· 8 years ago
05b43aa
clk: meson: gxbb: mpll: use rw operation
by Jerome Brunet
· 8 years ago
007e6e5
clk: meson: mpll: add rw operation
by Jerome Brunet
· 8 years ago
b92332e
clk: gxbb: put dividers and muxes in tables
by Jerome Brunet
· 8 years ago
e988aae
clk: meson8b: put dividers and muxes in tables
by Jerome Brunet
· 8 years ago
f7e3a82
clk: meson: add missing const qualifiers on gate arrays
by Jerome Brunet
· 8 years ago
1ddfe82e
clk: meson: fix SET_PARM macro
by Jerome Brunet
· 8 years ago
7f0b97d
Merge tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-fixes
by Stephen Boyd
· 8 years ago
9be8344
clk: rockchip: add pll_wait_lock for pll_enable
by Elaine Zhang
· 8 years ago
7e2a903
clk: rockchip: rename RK1108 to RV1108
by Andy Yan
· 8 years ago
b61753a
dt-bindings: rk1108-cru: rename RK1108 to RV1108
by Andy Yan
· 8 years ago
cecbe87
clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0
by Geert Uytterhoeven
· 8 years ago
5f3a432
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
by Geert Uytterhoeven
· 8 years ago
c013fc7
clk: renesas: r8a7796: Reformat core clock table
by Geert Uytterhoeven
· 8 years ago
3c969ce
clk: renesas: r8a7795: Reformat core clock table
by Geert Uytterhoeven
· 8 years ago
89aa58a
clk: renesas: r8a7796: Correct name of watchdog clock
by Geert Uytterhoeven
· 8 years ago
2122b56
clk: renesas: r8a7795: Correct name of watchdog clock
by Geert Uytterhoeven
· 8 years ago
a843ed3
clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs
by Geert Uytterhoeven
· 8 years ago
3913350
clk: tegra: Fix build warnings on Tegra20/Tegra30
by Thierry Reding
· 8 years ago
bea1baa
clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on
by Peter De Schrijver
· 8 years ago
59af78d
clk: tegra: Add SATA seq input control
by Peter De Schrijver
· 8 years ago
68d724c
clk: tegra: Add Tegra210 special resets
by Peter De Schrijver
· 8 years ago
e745f99
clk: tegra: Rework pll_u
by Peter De Schrijver
· 8 years ago
4236e75
clk: tegra: Implement reset control reset
by Mikko Perttunen
· 8 years ago
9619dba
clk: tegra: Fix disable unused for clocks sharing enable bit
by Peter De Schrijver
· 8 years ago
3843832
clk: tegra: Handle UTMIPLL IDDQ
by Peter De Schrijver
· 8 years ago
24c3ebe
clk: tegra: Add aclk
by Peter De Schrijver
· 8 years ago
e827ba18
clk: tegra: Add super clock mux/divider
by Peter De Schrijver
· 8 years ago
6cfc8bc
clk: tegra: Define Tegra210 DMIC clocks
by Peter De Schrijver
· 8 years ago
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