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Venu Byravarasue374b652013-01-16 03:30:19 +00001Tegra SOC USB PHY
2
3The device node for Tegra SOC USB PHY:
4
5Required properties :
6 - compatible : Should be "nvidia,tegra20-usb-phy".
Venu Byravarasud400f202013-05-16 19:42:55 +05307 - reg : Defines the following set of registers, in the order listed:
8 - The PHY's own register set.
9 Always present.
10 - The register set of the PHY containing the UTMI pad control registers.
11 Present if-and-only-if phy_type == utmi.
12 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
13 - clocks : Defines the clocks listed in the clock-names property.
14 - clock-names : The following clock names must be present:
15 - reg: The clock needed to access the PHY's own registers. This is the
16 associated EHCI controller's clock. Always present.
17 - pll_u: PLL_U. Always present.
18 - timer: The timeout clock (clk_m). Present if phy_type == utmi.
19 - utmi-pads: The clock needed to access the UTMI pad control registers.
20 Present if phy_type == utmi.
21 - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
22 Present if phy_type == ulpi, and ULPI link mode is in use.
Venu Byravarasue374b652013-01-16 03:30:19 +000023
Venu Byravarasu40e8b3a2013-01-24 15:46:46 +053024Required properties for phy_type == ulpi:
25 - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
26
Venu Byravarasud400f202013-05-16 19:42:55 +053027Required PHY timing params for utmi phy:
28 - nvidia,hssync-start-delay : Number of 480 Mhz clock cycles to wait before
29 start of sync launches RxActive
30 - nvidia,elastic-limit : Variable FIFO Depth of elastic input store
31 - nvidia,idle-wait-delay : Number of 480 Mhz clock cycles of idle to wait
32 before declare IDLE.
33 - nvidia,term-range-adj : Range adjusment on terminations
34 - nvidia,xcvr-setup : HS driver output control
35 - nvidia,xcvr-lsfslew : LS falling slew rate control.
36 - nvidia,xcvr-lsrslew : LS rising slew rate control.
37
Venu Byravarasue374b652013-01-16 03:30:19 +000038Optional properties:
39 - nvidia,has-legacy-mode : boolean indicates whether this controller can
40 operate in legacy mode (as APX 2500 / 2600). In legacy mode some
41 registers are accessed through the APB_MISC base address instead of
Venu Byravarasud400f202013-05-16 19:42:55 +053042 the USB controller.
43 - nvidia,is-wired : boolean. Indicates whether we can do certain kind of power
44 optimizations for the devices that are always connected. e.g. modem.
45 - dr_mode : dual role mode. Indicates the working mode for the PHY. Can be
46 "host", "peripheral", or "otg". Defaults to "host" if not defined.
47 host means this is a host controller
48 peripheral means it is device controller
49 otg means it can operate as either ("on the go")
50
Mikko Perttunen80bd8a92013-07-17 10:37:50 +030051VBUS control (required for dr_mode == host, optional for dr_mode == otg):
Venu Byravarasud400f202013-05-16 19:42:55 +053052 - vbus-supply: regulator for VBUS