Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 2 | # |
| 3 | # Makefile for the fpga framework and fpga manager drivers. |
| 4 | # |
| 5 | |
| 6 | # Core FPGA Manager Framework |
| 7 | obj-$(CONFIG_FPGA) += fpga-mgr.o |
| 8 | |
| 9 | # FPGA Manager Drivers |
Anatolij Gustschin | 34d1dc1 | 2017-06-14 10:36:35 -0500 | [diff] [blame] | 10 | obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o |
Joshua Clayton | 5692fae | 2017-06-14 10:36:29 -0500 | [diff] [blame] | 11 | obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o |
Joel Holdsworth | 21f8ba2 | 2017-02-27 16:14:26 -0600 | [diff] [blame] | 12 | obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o |
Paolo Pisati | 88fb3a0 | 2018-04-16 20:43:36 -0700 | [diff] [blame] | 13 | obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o |
Alan Tull | fab6266 | 2015-10-07 16:36:29 +0100 | [diff] [blame] | 14 | obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o |
Alan Tull | acbb910a | 2016-11-01 14:14:32 -0500 | [diff] [blame] | 15 | obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o |
Florian Fainelli | 4348f7e | 2017-02-27 16:14:22 -0600 | [diff] [blame] | 16 | obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o |
Anatolij Gustschin | 061c97d | 2017-03-23 19:34:26 -0500 | [diff] [blame] | 17 | obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o |
Moritz Fischer | 3778470 | 2015-10-16 15:42:30 -0700 | [diff] [blame] | 18 | obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o |
Matthew Gerlach | d201cc1 | 2017-03-23 19:34:28 -0500 | [diff] [blame] | 19 | obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o |
Matthew Gerlach | 5b73cb5 | 2017-03-23 19:34:30 -0500 | [diff] [blame] | 20 | obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o |
Alan Tull | 21aeda9 | 2016-11-01 14:14:28 -0500 | [diff] [blame] | 21 | |
| 22 | # FPGA Bridge Drivers |
| 23 | obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o |
Alan Tull | e5f8efa | 2016-11-01 14:14:30 -0500 | [diff] [blame] | 24 | obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o |
Alan Tull | ca24a64 | 2016-11-01 14:14:31 -0500 | [diff] [blame] | 25 | obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o |
Moritz Fischer | 7e961c1 | 2017-03-24 10:33:21 -0500 | [diff] [blame] | 26 | obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o |
Alan Tull | 0fa20cd | 2016-11-01 14:14:29 -0500 | [diff] [blame] | 27 | |
| 28 | # High Level Interfaces |
| 29 | obj-$(CONFIG_FPGA_REGION) += fpga-region.o |
Alan Tull | ef3acdd | 2017-11-15 14:20:25 -0600 | [diff] [blame] | 30 | obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o |
Wu Hao | 543be3d | 2018-06-30 08:53:13 +0800 | [diff] [blame] | 31 | |
| 32 | # FPGA Device Feature List Support |
| 33 | obj-$(CONFIG_FPGA_DFL) += dfl.o |
Kang Luwei | 322ddeb | 2018-06-30 08:53:21 +0800 | [diff] [blame^] | 34 | obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o |
| 35 | |
| 36 | dfl-fme-objs := dfl-fme-main.o |
Zhang Yi | 72ddd9f | 2018-06-30 08:53:19 +0800 | [diff] [blame] | 37 | |
| 38 | # Drivers for FPGAs which implement DFL |
| 39 | obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o |