| commit | aef13fd8426279fcd9e0b2b5b446d35c0d49ec5d | [log] [tgz] |
|---|---|---|
| author | Jernej Skrabec <jernej.skrabec@siol.net> | Mon Jun 25 14:02:58 2018 +0200 |
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | Wed Jun 27 21:44:01 2018 +0200 |
| tree | 9f719209bebfdfdb0f07edd48cb4cef12272af1f | |
| parent | 09f380e3ba4103a32faf4fad35d90dc144578214 [diff] |
drm/sun4i: DW HDMI PHY: Add support for second PLL Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select between two clock parents. Add code which reads second PLL from DT. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-19-jernej.skrabec@siol.net