tree 39f5bd29ef3dc47ff00e0c75b92fe9d7457ec4d5
parent 4a0e89b92cca69e72ac62e6356a39d8b230184d8
author Felix Fietkau <nbd@nbd.name> 1547216552 +0100
committer Paul Burton <paul.burton@mips.com> 1548184641 -0800
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MIPS: ath79: pass PLL base to clock init functions

Preparation for passing the mapped base via DT

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org