tree 1f4edf6dfa5a0fe9873b4371321da40eaea025a3
parent f18651eb2c7ac13b9dd0e3b357d07e1d4cd8e00d
author Krzysztof Hałasa <khalasa@piap.pl> 1393930235 +0100
committer Arnd Bergmann <arnd@arndb.de> 1395066800 +0100

CNS3xxx: Fix a WARN() related to IRQ allocation.

WARNING: at drivers/irqchip/irq-gic.c:952 gic_init_bases+0xe4/0x2b8()
Cannot allocate irq_descs @ IRQ16, assuming pre-allocated
Backtrace:
gic_init_bases    from cns3xxx_init_irq+0x24/0x34
cns3xxx_init_irq  from init_IRQ+0x24/0x2c
init_IRQ          from start_kernel+0x1a8/0x338
start_kernel      from 0x2000806c

The problem is that 64 CNS3xxx CPU interrupts, starting at 32, are
allocated by the ARM platform-independent code (as requested by
machine_desc->nr_irqs = 96), and then the GIC code tries to allocate
them again.

Tested on Gateworks Laguna board, masqueraded as CNS3420VB.

Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>