| commit | 62f0d7dc3bae9f7ce2701d6c8cfd3d93130017af | [log] [tgz] |
|---|---|---|
| author | Nava kishore Manne <nava.manne@xilinx.com> | Fri Jan 25 13:16:54 2019 +0530 |
| committer | Michal Simek <michal.simek@xilinx.com> | Tue Jan 29 14:08:40 2019 +0100 |
| tree | 3c9a25263e65d7afb2f9d807a02700ee2cb932ab | |
| parent | 3f1b66be4aaa5dbe0a16197bfdfc355cf1da7701 [diff] |
reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC. The zynqmp reset-controller has the ability to reset lines connected to different blocks and peripheral in the Soc. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>