commit | 550ab390d7c60b85cd896cf03a34f8eae8a65d69 | [log] [tgz] |
---|---|---|
author | Beniamino Galvani <b.galvani@gmail.com> | Tue Nov 18 15:30:35 2014 +0100 |
committer | Carlo Caione <carlo@caione.org> | Tue Nov 18 16:36:14 2014 +0100 |
tree | f880749d8051fb56356de52ba330a4194a5c546d | |
parent | aeff05a39a5a9b9a41fe96ef4f4246cef5fb2f4a [diff] |
ARM: meson: DTS: enable L2 cache This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>