| commit | 4f89f7b59a6ea17e81cff212c18a0b580ff5ff27 | [log] [tgz] |
|---|---|---|
| author | Jeffrey Hugo <jhugo@codeaurora.org> | Mon Dec 03 09:13:43 2018 -0700 |
| committer | Stephen Boyd <sboyd@kernel.org> | Mon Dec 03 09:57:28 2018 -0800 |
| tree | b2856361a79a8d98eb0bc00bc6f58309bfe83cb8 | |
| parent | 651022382c7f8da46cb4872a545ee1da6d097d2a [diff] |
clk: qcom: Fix MSM8998 resets The offsets for the defined BCR reset registers does not match the hardware documentation. Update the values to match the hardware documentation. Fixes: b5f5f525c547 (clk: qcom: Add MSM8998 Global Clock Control (GCC) driver) Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>