commit | 404525d5a7ecc847b5ac178dad96402f1e102ccc | [log] [tgz] |
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author | Maxime Ripard <maxime.ripard@free-electrons.com> | Fri Nov 16 21:21:43 2012 +0100 |
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Fri Nov 16 21:46:39 2012 +0100 |
tree | 6a1eb744d54f1d43734f65899e2e720010d0fb48 | |
parent | 77b67063bb6bce6d475e910d3b886a606d0d91f7 [diff] |
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Mike Turquette <mturquette@ti.com>