| commit | 3c1a8844369880d077f858f448afc4ef553d962a | [log] [tgz] |
|---|---|---|
| author | Chaotian Jing <chaotian.jing@mediatek.com> | Mon Oct 16 09:46:36 2017 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Thu Nov 02 15:20:25 2017 +0100 |
| tree | c6e483bbf89b0e45c3bc5693306eb9651c077796 | |
| parent | d9dcbfc880126b193eab418d7b64b3774cb57152 [diff] |
mmc: mediatek: add support of source_cg clock source clock need an independent cg to control, when doing clk mode switch, need gate source clock to avoid hw issue(multi-bit sync hw hang) Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>