tree 8022b8c7cdd0e2efc9f73e5f913cdd913078bd27
parent 9b30050908fad96968497e73b88626056ea33c96
author Jarkko Nikula <jhnikula@gmail.com> 1251019466 +0300
committer Mark Brown <broonie@opensource.wolfsonmicro.com> 1251192048 +0100

ASoC: OMAP: Fix setup of XCCR and RCCR registers in McBSP DAI

Commit ca6e2ce08679c094878d7f39a0349a7db1d13675 is setting up few XCCR and
RCCR bits for I2S and DPS_A formats. Part of the bits are already set
for all formats and I believe that XDISABLE and RDISABLE bits are
format independent.

As XCCR and RCCR are found only from OMAP2430 and OMAP34xx, I move setup
of XDISABLE and RDISABLE to where those cpu's are tested and remove format
dependent part for simplicity.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>