tree 13d7b2bdc69b947ae8cf01e0f0e541851af6dc9c
parent a735d992c2e71e230b798518b7fe954fdbc2dc8c
author Chen Zhen <zhen1.chen@samsung.com> 1400757703 +0200
committer Mark Brown <broonie@linaro.org> 1401110937 +0100

ASoC: max98090: Add NI/MI values for user pclk 19.2 MHz

This patch adds the clock divisor and multiplier NI, MI values for audio
sampling frequencies 44100 and 48000 Hz and PCLK 19.2 MHz. This is useful
for the Odroid X2/U2 boards when the codec works in master mode and its
MCLK clock is fed from the I2S CDCLK output.

Signed-off-by: Chen Zhen <zhen1.chen@samsung.com>
[s.nawrocki@samsung.com: edited the commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>