[XTENSA] Remove non-rt signal handling
The non-rt signal handling was never really used, so we don't break
anything. This patch also cleans up the signal stack-frame to make
it independent from the processor configuration. It also improves
the method used for controlling single-stepping. We now save and
restore the 'icountlevel' register that controls single stepping
and set or clear the saved state to enable or disable it.
Signed-off-by: Chris Zankel <chris@zankel.net>
diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h
index bd09ec0..aa21210 100644
--- a/include/asm-xtensa/coprocessor.h
+++ b/include/asm-xtensa/coprocessor.h
@@ -64,6 +64,7 @@
# define COPROCESSOR_INFO_SIZE 8
# endif
#endif
+#endif /* XCHAL_HAVE_CP */
#ifndef __ASSEMBLY__
@@ -74,8 +75,11 @@
# else
# define release_coprocessors(task)
# endif
-#endif
-#endif
+typedef unsigned char cp_state_t[XTENSA_CP_EXTRA_SIZE]
+ __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
+
+#endif /* !__ASSEMBLY__ */
+
#endif /* _XTENSA_COPROCESSOR_H */
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index f0f9fd8..1569b53 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -13,7 +13,6 @@
#ifndef _XTENSA_ELF_H
#define _XTENSA_ELF_H
-#include <asm/variant/core.h>
#include <asm/ptrace.h>
/* Xtensa processor ELF architecture-magic number */
@@ -49,7 +48,7 @@
elf_greg_t lcount;
elf_greg_t sar;
elf_greg_t syscall;
- elf_greg_t ar[XCHAL_NUM_AREGS];
+ elf_greg_t ar[64];
} xtensa_gregset_t;
#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h
index cad83e8..77ff02d 100644
--- a/include/asm-xtensa/ptrace.h
+++ b/include/asm-xtensa/ptrace.h
@@ -99,7 +99,8 @@
unsigned long windowbase; /* 48 */
unsigned long windowstart; /* 52 */
unsigned long syscall; /* 56 */
- int reserved[2]; /* 64 */
+ unsigned long icountlevel; /* 60 */
+ int reserved[1]; /* 64 */
/* Make sure the areg field is 16 bytes aligned. */
int align[0] __attribute__ ((aligned(16)));
diff --git a/include/asm-xtensa/sigcontext.h b/include/asm-xtensa/sigcontext.h
index a751772..e3381ce 100644
--- a/include/asm-xtensa/sigcontext.h
+++ b/include/asm-xtensa/sigcontext.h
@@ -5,21 +5,12 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2001 - 2003 Tensilica Inc.
+ * Copyright (C) 2001 - 2007 Tensilica Inc.
*/
#ifndef _XTENSA_SIGCONTEXT_H
#define _XTENSA_SIGCONTEXT_H
-#define _ASMLANGUAGE
-#include <asm/processor.h>
-#include <asm/coprocessor.h>
-
-
-struct _cpstate {
- unsigned char _cpstate[XTENSA_CP_EXTRA_SIZE];
-} __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
-
struct sigcontext {
unsigned long oldmask;
@@ -27,18 +18,13 @@
/* CPU registers */
unsigned long sc_pc;
unsigned long sc_ps;
- unsigned long sc_wmask;
- unsigned long sc_windowbase;
- unsigned long sc_windowstart;
unsigned long sc_lbeg;
unsigned long sc_lend;
unsigned long sc_lcount;
unsigned long sc_sar;
- unsigned long sc_depc;
- unsigned long sc_dareg0;
- unsigned long sc_treg[4];
- unsigned long sc_areg[XCHAL_NUM_AREGS];
- struct _cpstate *sc_cpstate;
+ unsigned long sc_acclo;
+ unsigned long sc_acchi;
+ unsigned long sc_a[16];
};
-#endif /* __ASM_XTENSA_SIGCONTEXT_H */
+#endif /* _XTENSA_SIGCONTEXT_H */
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
index 8a7fb69..9bd3402 100644
--- a/include/asm-xtensa/unistd.h
+++ b/include/asm-xtensa/unistd.h
@@ -485,8 +485,8 @@
__SYSCALL(218, sys_sched_rr_get_interval, 2)
#define __NR_sched_yield 219
__SYSCALL(219, sys_sched_yield, 0)
-#define __NR_sigreturn 222
-__SYSCALL(222, xtensa_sigreturn, 0)
+#define __NR_available222 222
+__SYSCALL(222, sys_ni_syscall, 0)
/* Signal Handling */