tree 5490603bc850bc44b152d99b005296f94b701dc6
parent 20ea26a1e3a513dadafcd35531c6d289820f60cb
author Kishon Vijay Abraham I <kishon@ti.com> 1517835016 +0530
committer Ulf Hansson <ulf.hansson@linaro.org> 1520236857 +0100

mmc: sdhci-omap: Add custom set_uhs_signaling sdhci_host ops

UHS-1 DDR50 and MMC DDR52 mode require DDR bit to be
set in the configuration register (MMCHS_CON). Add
sdhci-omap specific set_uhs_signaling ops to set
this bit. Also while setting the UHSMS bit, clock should be
disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>