| commit | 2484ae57c26a9ad04c71bd82e5349ef35f186219 | [log] [tgz] |
|---|---|---|
| author | Guillaume La Roque <glaroque@baylibre.com> | Tue May 14 10:26:52 2019 +0200 |
| committer | Linus Walleij <linus.walleij@linaro.org> | Thu May 23 09:24:46 2019 +0200 |
| tree | 4c9acfb4584771f9e5ec8e61e459997d003dab49 | |
| parent | 6ea3e3bbef3705225bb675a8c57af58420c23f81 [diff] |
pinctrl: meson: g12a: add DS bank value add drive-strength bank regiter and bit value for G12A SoC Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>