| commit | 956060a52795a060833e8de2d1bb89209e61bed2 | [log] [tgz] |
|---|---|---|
| author | Elaine Zhang <zhangqing@rock-chips.com> | Fri Jun 15 10:16:50 2018 +0800 |
| committer | Heiko Stuebner <heiko@sntech.de> | Fri Jul 06 19:17:57 2018 +0200 |
| tree | 2cc5d99d9e264bad467efcc7f3458d9875b4743f | |
| parent | d409d59f021d4c8c97a2ee29d1cae74773fb36bd [diff] |
clk: rockchip: add support for half divider The new Rockchip socs have optional half divider: The formula is shown as: freq_out = 2*freq_in / (2*div + 3) Is this the same for all of new SoCs. So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \ DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV" to hook that special divider clock-type into our clock-tree. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>