tree d872c69b79fb8e2845a60a167af15ef66d466ad4
parent 1e12c4a9393b75a744aada2c8115434572698bc3
author Marc Zyngier <marc.zyngier@arm.com> 1470725444 +0100
committer Marc Zyngier <marc.zyngier@arm.com> 1471455080 +0100

irqchip/gic: Allow self-SGIs for SMP on UP configurations

On systems where a single CPU is present, the GIC may not support
having SGIs delivered to a target list. In that case, we use the
self-SGI mechanism to allow the interrupt to be delivered locally.

Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>