| commit | 04fac2412ba413fc9f7f792baa0b67d92ff4d1a4 | [log] [tgz] |
|---|---|---|
| author | Venkat Reddy Talla <vreddytalla@nvidia.com> | Tue Mar 10 16:13:56 2020 +0530 |
| committer | Thierry Reding <treding@nvidia.com> | Fri Mar 13 10:53:10 2020 +0100 |
| tree | a37f8ea0a2c2b7388b4853c257b6b2e13219e758 | |
| parent | 03e917b2a025d6a676af4c2ae9c410c049bda161 [diff] |
soc/tegra: pmc: Add pins for Tegra194 Extend the Tegra194 IO pad table with additional information such as pin names and 1.8/3.3 V settings to allow a table of voltage control pins to generated from it. This is similar to what's done for older chips and is needed to support high-speed modes for SDHCI where switching the pins to 1.8V or 3.3V is necessary. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>