- b998b75 clk: sunxi-ng: sun8i-de2: Sort structures by Jernej Skrabec · 5 years ago
- 11d0c43 clk: sunxi-ng: sun8i-de2: Add R40 specific quirks by Jernej Skrabec · 5 years ago
- b0bfba9 clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T by Jernej Skrabec · 5 years ago
- 8f9b11a clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets by Jernej Skrabec · 5 years ago
- 75250eb clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core by Jernej Skrabec · 5 years ago
- b4bbce6 clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64 by Jernej Skrabec · 5 years ago
- 2b48dcb clk: sunxi-ng: sun8i-de2: Split out H5 definitions by Jernej Skrabec · 5 years ago
- 1de8493 clk: sunxi-ng: a64: Export MBUS clock by Jernej Skrabec · 5 years ago
- f4a6365 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 5 years ago
- 9c232d3 clk: sunxi: a23/a33: Export the MIPI PLL by Maxime Ripard · 5 years ago
- a655ede clk: sunxi: a31: Export the MIPI PLL by Maxime Ripard · 5 years ago
- a9b5c67 clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS by Vasily Khoruzhick · 5 years ago
- ec97faf clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock by Icenowy Zheng · 5 years ago
- b406cad clk: sunxi-ng: r40: Export MBUS clock by Chen-Yu Tsai · 5 years ago
- 0c54524 clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent order by Samuel Holland · 5 years ago
- 675a6d4 clk: sunxi-ng: h6-r: Simplify R_APB1 clock definition by Samuel Holland · 5 years ago
- 47d64fe clk: sunxi-ng: sun8i-r: Fix divider on APB0 clock by Samuel Holland · 5 years ago
- c7b3052 clk: sunxi-ng: r40: Allow setting parent rate for external clock outputs by Chen-Yu Tsai · 5 years ago
- 4ff40d1 clk: sunxi-ng: v3s: Fix incorrect number of hw_clks. by Yunhao Tian · 5 years ago
- ddebe83 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 5 years ago
- 4441b57 clk: sunxi-ng: h3: Export MBUS clock by Jernej Skrabec · 5 years ago
- cdfc2e2 clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 by Colin Ian King · 5 years ago
- 834f65e clk: sunxi-ng: h6: Allow GPU to change parent rate by Jernej Skrabec · 5 years ago
- 3ee5f8ab clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL by Jernej Skrabec · 5 years ago
- a1ff1ce Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next by Stephen Boyd · 5 years ago
- 65818ad clk: sunxi-ng: h6: Allow I2S to change parent rate by Jernej Skrabec · 5 years ago
- a7b85ad clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered by Stephen Boyd · 5 years ago
- 0ed4c25 clk: sunxi-ng: v3s: add Allwinner V3 support by Icenowy Zheng · 5 years ago
- 7200996 clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks by Icenowy Zheng · 5 years ago
- c5ed947 clk: sunxi-ng: v3s: add the missing PLL_DDR1 by Icenowy Zheng · 6 years ago
- 916f562 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 6 years ago
- f925a05 Merge tag 'sunxi-ng-parent-rewrite-part-1-take-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner by Stephen Boyd · 6 years ago
- 89f27fb clk: sunxi-ng: sun8i-r: Use local parent references for SUNXI_CCU_GATE by Chen-Yu Tsai · 6 years ago
- 4b88915 clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATE by Chen-Yu Tsai · 6 years ago
- 4b751ff clk: sunxi-ng: gate: Add macros for referencing local clock parents by Chen-Yu Tsai · 6 years ago
- 22ce173 clk: sunxi-ng: h6-r: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 8916d3f clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- ecd73c0 clk: sunxi-ng: a64: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 4d34497 clk: sunxi-ng: f1c100s: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 45d0706 clk: sunxi-ng: sun8i-r: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 707f601 clk: sunxi-ng: v3s: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 3fccf2e clk: sunxi-ng: r40: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- b28e3eb clk: sunxi-ng: h3: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- cdaf838 clk: sunxi-ng: a33: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 7a40e3d clk: sunxi-ng: a23: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 8b1dd56 clk: sunxi-ng: a31: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 260311b clk: sunxi-ng: sun5i: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- d1c92473 clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTOR by Chen-Yu Tsai · 6 years ago
- 6873d20 clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* by Chen-Yu Tsai · 6 years ago
- 9309448 clk: sunxi-ng: switch to of_clk_hw_register() for registering clks by Chen-Yu Tsai · 6 years ago
- 9c92ab6 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 by Thomas Gleixner · 6 years ago
- f167675 clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register by Ondrej Jirman · 6 years ago
- c942fdd treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 by Thomas Gleixner · 6 years ago
- 2874c5f treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 by Thomas Gleixner · 6 years ago
- ec8f24b treewide: Add SPDX license identifier - Makefile/Kconfig by Thomas Gleixner · 6 years ago
- 62e59c4 clk: Remove io.h from clk-provider.h by Stephen Boyd · 6 years ago
- ff06001 Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next by Stephen Boyd · 6 years ago
- 5816b74 Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and 'clk-qoriq' into clk-next by Stephen Boyd · 6 years ago
- d65530c clk: sunxi-ng: Use the correct style for SPDX License Identifier by Nishad Kamdar · 6 years ago
- c77ceba clk: sunxi-ng: sun5i: Export the MBUS clock by Maxime Ripard · 7 years ago
- b3adde0 clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk by Chen-Yu Tsai · 6 years ago
- 1054e4d clk: sunxi-ng: nkmp: Explain why zero width check is needed by Jernej Skrabec · 6 years ago
- 6597ce3 clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate by Jernej Skrabec · 6 years ago
- 26fae7a clk: sunxi-ng: h6: Preset hdmi-cec clock parent by Jernej Skrabec · 6 years ago
- 2abc330 clk: sunxi-ng: nkmp: Avoid GENMASK(-1, 0) by Jernej Skrabec · 6 years ago
- 6630aad clk: sunxi-ng: f1c100s: fix USB PHY gate bit offset by Icenowy Zheng · 6 years ago
- ab65e04 clk: sunxi-ng: Allow DE clock to set parent rate by Jernej Skrabec · 6 years ago
- 3f8e7e7 Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next by Stephen Boyd · 6 years ago
- ee0b27a clk: sunxi: A31: Fix wrong AHB gate number by Andre Przywara · 6 years ago
- 108a459 clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it by Chen-Yu Tsai · 6 years ago
- 5c59801 clk: sunxi-ng: v3s: Fix TCON reset de-assert bit by Paul Kocialkowski · 6 years ago
- 67ee606 clk: sunxi-ng: a64: Allow parent change for VE clock by Jernej Skrabec · 6 years ago
- 6e6da20 clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks by Chen-Yu Tsai · 6 years ago
- 37bb183 clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL by Chen-Yu Tsai · 6 years ago
- 64f2843 clk: sunxi-ng: h3: Allow parent change for ve clock by Jernej Skrabec · 6 years ago
- 0380126 clk: sunxi-ng: add support for suniv F1C100s SoC by Mesih Kilinc · 6 years ago
- 7bb7d29 clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent by Chen-Yu Tsai · 6 years ago
- 01a7ea7 clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output by Chen-Yu Tsai · 6 years ago
- 5e06aa5 clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL by Chen-Yu Tsai · 6 years ago
- ee67870 clk: sunxi-ng: a64: Fix gate bit of DSI DPHY by Jagan Teki · 6 years ago
- 7d3cf7d clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I by Jagan Teki · 6 years ago
- 56808da clk: sunxi-ng: Add support for H6 DE3 clocks by Jernej Skrabec · 6 years ago
- ed44334 clk: sunxi-ng: h6: Set video PLLs limits by Jernej Skrabec · 6 years ago
- 65b6657 clk: sunxi-ng: Use u64 for calculation of NM rate by Jernej Skrabec · 6 years ago
- 3f79043 clk: sunxi-ng: Adjust MP clock parent rate when allowed by Jernej Skrabec · 6 years ago
- db754893 clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width by Jagan Teki · 6 years ago
- 859783d clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock by Icenowy Zheng · 6 years ago
- 519f64b Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 6 years ago
- 80a6ec7 clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting by Chen-Yu Tsai · 6 years ago
- 8b2a378 dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro by Jagan Teki · 6 years ago
- 5de39ac clk: sunxi-ng: a64: Add max. rate constraint to video PLLs by Icenowy Zheng · 6 years ago
- 65b1e8a clk: sunxi-ng: a64: Add minimal rate for video PLLs by Jagan Teki · 6 years ago
- c2ff838 clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks by Icenowy Zheng · 6 years ago
- a528872 clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs by Jernej Skrabec · 6 years ago
- a8e5433 clk: sunxi-ng: nkmp: Add constraint for maximum rate by Jernej Skrabec · 6 years ago
- b16fb66 clk: sunxi-ng: r40: Add max. rate constraint to video PLLs by Jernej Skrabec · 6 years ago
- 02d7901 clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video by Jernej Skrabec · 6 years ago
- cb54fbd clk: sunxi-ng: Add maximum rate constraint to NM PLLs by Jernej Skrabec · 6 years ago
- 58c0f79 clk: sunxi-ng: h6: fix PWM gate/reset offset by Rongyi Chen · 6 years ago
- 2852bfb clk: sunxi-ng: h6: fix bus clocks' divider position by Icenowy Zheng · 6 years ago