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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 3a0a397ff5ff8b56ca9f7908b75dee6bf0b5fabb / arch / arm64
  1. 3a0a397 arm64: Kill PSCI_GET_VERSION as a variant-2 workaround by Marc Zyngier · 7 years ago
  2. b092201 arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support by Marc Zyngier · 7 years ago
  3. f72af90 arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling by Marc Zyngier · 7 years ago
  4. 6167ec5 arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support by Marc Zyngier · 7 years ago
  5. a4097b3 arm/arm64: KVM: Turn kvm_psci_version into a static inline by Marc Zyngier · 7 years ago
  6. 09e6be1 arm/arm64: KVM: Advertise SMCCC v1.1 by Marc Zyngier · 7 years ago
  7. 1a2fb94 arm/arm64: KVM: Consolidate the PSCI include files by Marc Zyngier · 7 years ago
  8. f5115e8 arm64: KVM: Increment PC after handling an SMC trap by Marc Zyngier · 7 years ago
  9. c0938c7 arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls by Marc Zyngier · 7 years ago
  10. 30d88c0 arm64: entry: Apply BP hardening for suspicious interrupts from EL0 by Will Deacon · 7 years ago
  11. 5dfc6ed arm64: entry: Apply BP hardening for high-priority synchronous exceptions by Will Deacon · 7 years ago
  12. 91b2d34 arm64: futex: Mask __user pointers prior to dereference by Will Deacon · 7 years ago
  13. f71c2ff arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user by Will Deacon · 7 years ago
  14. 8462408 arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user by Will Deacon · 7 years ago
  15. c2f0ad4 arm64: uaccess: Prevent speculative use of the current addr_limit by Will Deacon · 7 years ago
  16. 6314d90 arm64: entry: Ensure branch through syscall table is bounded under speculation by Will Deacon · 7 years ago
  17. 4d8efc2 arm64: Use pointer masking to limit uaccess speculation by Robin Murphy · 7 years ago
  18. 51369e3 arm64: Make USER_DS an inclusive limit by Robin Murphy · 7 years ago
  19. 022620e arm64: Implement array_index_mask_nospec() by Robin Murphy · 7 years ago
  20. 669474e arm64: barrier: Add CSDB macros to control data-value prediction by Will Deacon · 7 years ago
  21. 439e70e arm64: idmap: Use "awx" flags for .idmap.text .pushsection directives by Will Deacon · 7 years ago
  22. 79ddab3 arm64: assembler: Align phys_to_pte with pte_to_phys by Will Deacon · 7 years ago
  23. f167211 arm64: entry: Reword comment about post_ttbr_update_workaround by Will Deacon · 7 years ago
  24. fa0465f arm64: assembler: Change order of macro arguments in phys_to_ttbr by Will Deacon · 7 years ago
  25. 6dc52b1 arm64: Force KPTI to be disabled on Cavium ThunderX by Marc Zyngier · 7 years ago
  26. f992b4d arm64: kpti: Add ->enable callback to remap swapper using nG mappings by Will Deacon · 7 years ago
  27. 4e60205 arm64: mm: Permit transitioning from Global to Non-Global without BBM by Will Deacon · 7 years ago
  28. 41acec6 arm64: kpti: Make use of nG dependent on arm64_kernel_unmapped_at_el0() by Will Deacon · 7 years ago
  29. 3060e9f arm64: Add software workaround for Falkor erratum 1041 by Shanker Donthineni · 7 years ago
  30. 202fb4e arm64: spinlock: Fix theoretical trylock() A-B-A with LSE atomics by Will Deacon · 7 years ago
  31. ec89ab5 arm64: Fix TTBR + PAN + 52-bit PA logic in cpu_do_switch_mm by Steve Capper · 7 years ago
  32. 0ba2e29 arm64: Turn on KPTI only on CPUs that need it by Jayachandran C · 7 years ago
  33. f3d795d arm64: Branch predictor hardening for Cavium ThunderX2 by Jayachandran C · 7 years ago
  34. 55b35d0 arm64: Run enable method for errata work arounds on late CPUs by Suzuki K Poulose · 7 years ago
  35. a8e4c0a arm64: Move BP hardening to check_and_switch_context by Marc Zyngier · 7 years ago
  36. e9eaa80 arm64: mm: ignore memory above supported physical address size by Kristina Martsenko · 7 years ago
  37. 6b88a32 arm64: kpti: Fix the interaction between ASID switching and software PAN by Catalin Marinas · 7 years ago
  38. 558daf6 KVM: arm64: Emulate RAS error registers and set HCR_EL2's TERR & TEA by Dongjiu Geng · 7 years ago
  39. 0067df4 KVM: arm64: Handle RAS SErrors from EL2 on guest exit by James Morse · 7 years ago
  40. 3368bd8 KVM: arm64: Handle RAS SErrors from EL1 on guest exit by James Morse · 7 years ago
  41. c60590b KVM: arm64: Save ESR_EL2 on guest SError by James Morse · 7 years ago
  42. c773ae2 KVM: arm64: Save/Restore guest DISR_EL1 by James Morse · 7 years ago
  43. 4715c14 KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2. by James Morse · 7 years ago
  44. 4f5abad KVM: arm/arm64: mask/unmask daif around VHE guests by James Morse · 7 years ago
  45. 68ddbf0 arm64: kernel: Prepare for a DISR user by James Morse · 7 years ago
  46. f751daa arm64: Unconditionally enable IESB on exception entry/return for firmware-first by James Morse · 7 years ago
  47. 6bf0dcf arm64: kernel: Survive corrected RAS errors notified by SError by James Morse · 7 years ago
  48. 64c0272 arm64: cpufeature: Detect CPU RAS Extentions by Xie XiuQi · 7 years ago
  49. 7a00d68 arm64: sysreg: Move to use definitions for all the SCTLR bits by James Morse · 7 years ago
  50. edf298c arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early by James Morse · 7 years ago
  51. 0abdeff arm64: fpsimd: Fix state leakage when migrating after sigreturn by Dave Martin · 7 years ago
  52. 29d9bef arm64: Correct type for PUD macros by Punit Agrawal · 7 years ago
  53. 894cfd1 arm64: Inform user if software PAN is in use by Stephen Boyd · 7 years ago
  54. 39610a6 arm64: fix comment above tcr_compute_pa_size by Kristina Martsenko · 7 years ago
  55. 6a20542 arm64: fix ID map extension to 52 bits by Kristina Martsenko · 7 years ago
  56. 071929d arm64: Stop printing the virtual memory layout by Laura Abbott · 7 years ago
  57. 67948af arm64: capabilities: Handle duplicate entries for a capability by Suzuki K Poulose · 7 years ago
  58. bb48711 arm64: cpu_errata: Add Kryo to Falkor 1003 errata by Stephen Boyd · 7 years ago
  59. 0370b31 arm64: Extend early page table code to allow for larger kernels by Steve Capper · 7 years ago
  60. 1e1b8c0 arm64: entry: Move the trampoline to be before PAN by Steve Capper · 7 years ago
  61. 9dfe482 arm64: Re-order reserved_ttbr0 in linker script by Steve Capper · 7 years ago
  62. 79e9aa5 arm64: sdei: Add trampoline code for remapping the kernel by James Morse · 7 years ago
  63. 83f8ee3 arm64: mmu: add the entry trampolines start/end section markers into sections.h by James Morse · 7 years ago
  64. fa31ab7 arm64: acpi: Remove __init from acpi_psci_use_hvc() for use by SDEI by James Morse · 7 years ago
  65. f5df269 arm64: kernel: Add arch-specific SDEI entry code and CPU masking by James Morse · 7 years ago
  66. e1281f5 arm64: uaccess: Add PAN helper by James Morse · 7 years ago
  67. ed8b20d arm64: Add vmap_stack header file by James Morse · 7 years ago
  68. ad6eb31 firmware: arm_sdei: Add driver for Software Delegated Exceptions by James Morse · 7 years ago
  69. 1f74267 KVM: arm64: Stop save/restoring host tpidr_el1 on VHE by James Morse · 7 years ago
  70. 6d99b68 arm64: alternatives: use tpidr_el2 on VHE hosts by James Morse · 7 years ago
  71. c97e166 KVM: arm64: Change hyp_panic()s dependency on tpidr_el2 by James Morse · 7 years ago
  72. 32b03d1 KVM: arm64: Store vcpu on the stack during __guest_enter() by James Morse · 7 years ago
  73. 3423cab Merge branch 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux by Catalin Marinas · 7 years ago
  74. 0d90718 arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs by Jayachandran C · 7 years ago
  75. ec82b56 arm64: Implement branch predictor hardening for Falkor by Shanker Donthineni · 7 years ago
  76. aa6acde arm64: Implement branch predictor hardening for affected Cortex-A CPUs by Will Deacon · 7 years ago
  77. a65d219 arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 by Will Deacon · 7 years ago
  78. 9034868 arm64: KVM: Make PSCI_VERSION a fast path by Marc Zyngier · 7 years ago
  79. 6840bdd arm64: KVM: Use per-CPU vector when BP hardening is enabled by Marc Zyngier · 7 years ago
  80. 0f15adb arm64: Add skeleton to harden the branch predictor against aliasing attacks by Will Deacon · 7 years ago
  81. 95e3de3 arm64: Move post_ttbr_update_workaround to C code by Marc Zyngier · 7 years ago
  82. 0a0d111d arm64: cpufeature: Pass capability structure to ->enable callback by Will Deacon · 7 years ago
  83. 179a56f arm64: Take into account ID_AA64PFR0_EL1.CSV3 by Will Deacon · 7 years ago
  84. 0617052 arm64: Kconfig: Reword UNMAP_KERNEL_AT_EL0 kconfig entry by Will Deacon · 7 years ago
  85. be04a6d arm64: use RET instruction for exiting the trampoline by Will Deacon · 7 years ago
  86. 3b3b681 arm64: v8.4: Support for new floating point multiplication instructions by Dongjiu Geng · 7 years ago
  87. a8ffaaa arm64: asid: Do not replace active_asids if already 0 by Catalin Marinas · 7 years ago
  88. 7520fa9 perf: ARM DynamIQ Shared Unit PMU support by Suzuki K Poulose · 7 years ago
  89. 52cac11 arm64: Use of_cpu_node_to_id helper for CPU topology parsing by Suzuki K Poulose · 7 years ago
  90. f5ed22e arm64: make label allocation style consistent in tishift by Jason A. Donenfeld · 7 years ago
  91. 8b9951e ARM64 / cpuidle: Use new cpuidle macro for entering retention state by Prashanth Prakash · 7 years ago
  92. 1f911c3 Merge branch 'for-next/52-bit-pa' into for-next/core by Catalin Marinas · 7 years ago
  93. f77d281 arm64: enable 52-bit physical address support by Kristina Martsenko · 7 years ago
  94. fa2a844 arm64: allow ID map to be extended to 52 bits by Kristina Martsenko · 7 years ago
  95. 75387b9 arm64: handle 52-bit physical addresses in page table entries by Kristina Martsenko · 7 years ago
  96. 1933830 arm64: don't open code page table entry creation by Kristina Martsenko · 7 years ago
  97. e6d588a arm64: head.S: handle 52-bit PAs in PTEs in early page table setup by Kristina Martsenko · 7 years ago
  98. 529c4b0 arm64: handle 52-bit addresses in TTBR by Kristina Martsenko · 7 years ago
  99. 787fd1d arm64: limit PA size to supported range by Kristina Martsenko · 7 years ago
  100. 982aa7c arm64: add kconfig symbol to configure physical address size by Kristina Martsenko · 7 years ago