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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 361b0d286afea0d867537536977a695b5557d133 / drivers / clk / tegra
  1. 916f562 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 5 years ago
  2. 556e2f6 Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 6 years ago
  3. e3527dc clk: tegra: Do not enable PLL_RE_VCO on Tegra210 by Thierry Reding · 6 years ago
  4. c1139d2 clk: tegra: Warn if an enabled PLL is in IDDQ by Thierry Reding · 6 years ago
  5. 2067507 clk: tegra: Do not warn unnecessarily by Thierry Reding · 6 years ago
  6. 0d34dfb clk: tegra210: fix PLLU and PLLU_OUT1 by JC Kuo · 6 years ago
  7. d2912cb treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 by Thomas Gleixner · 6 years ago
  8. 9caec66 clk: tegra210: Fix default rates for HDA clocks by Jon Hunter · 6 years ago
  9. 9c92ab6 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 by Thomas Gleixner · 6 years ago
  10. 9952f69 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 by Thomas Gleixner · 6 years ago
  11. 1802d0b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 by Thomas Gleixner · 6 years ago
  12. ec8f24b treewide: Add SPDX license identifier - Makefile/Kconfig by Thomas Gleixner · 6 years ago
  13. 62e59c4 clk: Remove io.h from clk-provider.h by Stephen Boyd · 6 years ago
  14. ff06001 Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next by Stephen Boyd · 6 years ago
  15. 7e9c62b Merge branches 'clk-sa', 'clk-aspeed', 'clk-samsung', 'clk-ingenic' and 'clk-zynq' into clk-next by Stephen Boyd · 6 years ago
  16. e71f4d3 clk: tegra: divider: Mark Memory Controller clock as read-only by Dmitry Osipenko · 6 years ago
  17. f403765 clk: tegra: emc: Replace BUG() with WARN_ONCE() by Dmitry Osipenko · 6 years ago
  18. 913c307 clk: tegra: emc: Fix EMC max-rate clamping by Dmitry Osipenko · 6 years ago
  19. 888ca40 clk: tegra: emc: Support multiple RAM codes by Dmitry Osipenko · 6 years ago
  20. 924ee3d clk: tegra: emc: Don't enable EMC clock manually by Dmitry Osipenko · 6 years ago
  21. 449c695 clk: tegra124: Remove lock-enable bit from PLLM by Dmitry Osipenko · 6 years ago
  22. 40db569 clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider by Dmitry Osipenko · 6 years ago
  23. 5834fd7 clk: core: replace clk_{readl,writel} with {readl,writel} by Jonas Gorski · 6 years ago
  24. bff1cef clk: tegra: Don't enable already enabled PLLs by Dmitry Osipenko · 6 years ago
  25. b331db5 clk: tegra: Make tegra_clk_super_mux_ops static by YueHaibing · 6 years ago
  26. dc2535b Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 6 years ago
  27. 75f486c Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next by Stephen Boyd · 6 years ago
  28. e7e6198 clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings by YueHaibing · 6 years ago
  29. bb87270 clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static by Wei Yongjun · 6 years ago
  30. 7e5c4c2 Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers by Arnd Bergmann · 6 years ago
  31. 8bf9437 clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 by Peter De Schrijver · 6 years ago
  32. 2b2dbc2 clk: tegra: dfll: add CVB tables for Tegra210 by Joseph Lo · 6 years ago
  33. f7ebf88 clk: tegra: dfll: round down voltages based on alignment by Joseph Lo · 6 years ago
  34. 36541f0 clk: tegra: dfll: support PWM regulator control by Joseph Lo · 6 years ago
  35. b3cf8d0 clk: tegra: dfll: CVB calculation alignment with the regulator by Joseph Lo · 6 years ago
  36. b0dcfb7 clk: tegra: dfll: registration for multiple SoCs by Peter De Schrijver · 6 years ago
  37. d39eca5 clk: tegra: dfll: Fix a potential Oop in remove() by Dan Carpenter · 6 years ago
  38. ffe0554 Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next by Stephen Boyd · 6 years ago
  39. 08441a96 clk: tegra: Return the exact clock rate from clk_round_rate by Robert Yang · 6 years ago
  40. b158aee clk: tegra30: Use Tegra CPU powergate helper function by Jon Hunter · 6 years ago
  41. 845d782 clk: tegra: Fix maximum audio sync clock for Tegra124/210 by Jon Hunter · 6 years ago
  42. 7514557 clk: tegra: get rid of duplicate defines by Marcel Ziswiler · 6 years ago
  43. e374e06 clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro by Yangtao Li · 6 years ago
  44. d14ce17 clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC by Dmitry Osipenko · 6 years ago
  45. 514fddb clk: tegra20: Turn EMC clock gate into divider by Dmitry Osipenko · 6 years ago
  46. c8da78e clk: tegra210: Include size.h for compilation ease by Stephen Boyd · 6 years ago
  47. a4dbbce clk: tegra: Fixes for MBIST work around by Joseph Lo · 6 years ago
  48. 923ca13 clk: tegra: probe deferral error reporting by Marcel Ziswiler · 6 years ago
  49. 032405a Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next by Stephen Boyd · 6 years ago
  50. 1390546 Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-tegra-critical' and 'clk-tegra-emc-oob' into clk-next by Stephen Boyd · 6 years ago
  51. c76a69e clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks by Peter De-Schrijver · 6 years ago
  52. 633e796 clk: tegra: Add sdmmc mux divider clock by Peter De-Schrijver · 6 years ago
  53. cb3ac59 clk: tegra: Refactor fractional divider calculation by Peter De Schrijver · 6 years ago
  54. 0cbb61a clk: tegra: Fix includes required by fence_udelay() by Aapo Vienamo · 6 years ago
  55. 405fcac clk: tegra: emc: Avoid out-of-bounds bug by Dmitry Osipenko · 7 years ago
  56. da0d223 clk: tegra: Mark Memory Controller clock as critical by Dmitry Osipenko · 7 years ago
  57. 8097d4c clk: tegra: Make vde a child of pll_c3 by Thierry Reding · 7 years ago
  58. 26f8590 clk: tegra: Make vic03 a child of pll_c3 by Thierry Reding · 7 years ago
  59. f7b3182 clk: tegra: bpmp: Don't crash when a clock fails to register by Mikko Perttunen · 7 years ago
  60. 6396bb2 treewide: kzalloc() -> kcalloc() by Kees Cook · 7 years ago
  61. ef1ae47 Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and 'clk-debugfs-simple' into clk-next by Stephen Boyd · 7 years ago
  62. df500f2 clk: tegra: no need to check return value of debugfs_create functions by Greg Kroah-Hartman · 7 years ago
  63. 5d79711 clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20 by Dmitry Osipenko · 7 years ago
  64. efc351b clk: tegra20: Correct parents of CDEV1/2 clocks by Dmitry Osipenko · 7 years ago
  65. 08a5259 clk: tegra20: Add DEV1/DEV2 OSC dividers by Dmitry Osipenko · 7 years ago
  66. c35b518 clk: tegra: Fix pll_u rate configuration by Marcel Ziswiler · 7 years ago
  67. c485ad6 clk: tegra: Specify VDE clock rate by Dmitry Osipenko · 7 years ago
  68. ea141d5 clk: tegra20: Correct PLL_C_OUT1 setup by Dmitry Osipenko · 7 years ago
  69. 2dcabf0 clk: tegra: Mark HCLK, SCLK and EMC as critical by Dmitry Osipenko · 7 years ago
  70. e403d00 clk: tegra: MBIST work around for Tegra210 by Peter De Schrijver · 7 years ago
  71. cbfc8d0 clk: tegra: add fence_delay for clock registers by Peter De Schrijver · 7 years ago
  72. 89e423c clk: tegra: Add la clock for Tegra210 by Peter De Schrijver · 7 years ago
  73. fc35c19 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 7 years ago
  74. b244131 License cleanup: add SPDX GPL-2.0 license identifier to files with no license by Greg Kroah-Hartman · 7 years ago
  75. 22ef01a clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init() by Nicolin Chen · 7 years ago
  76. 1752c9e clk: tegra: dfll: Fix drvdata overwriting issue by Nicolin Chen · 7 years ago
  77. 54eff22 clk: tegra: Fix cclk_lp divisor register by Michał Mirosław · 7 years ago
  78. d80a32f clk: tegra: Bump SCLK clock rate to 216 MHz by Dmitry Osipenko · 7 years ago
  79. 5a6b184 clk: tegra: Use common definition of APBDMA clock gate by Dmitry Osipenko · 7 years ago
  80. 3ff46fd clk: tegra: Correct parent of the APBDMA clock by Dmitry Osipenko · 7 years ago
  81. 899f809 clk: tegra: Add AHB DMA clock entry by Dmitry Osipenko · 7 years ago
  82. 109eba2 clk: tegra: Mark APB clock as critical by Jon Hunter · 7 years ago
  83. d83b26e clk: tegra: Make tegra_clk_pll_params __ro_after_init by Bhumika Goyal · 7 years ago
  84. bc2e4d2 clk: tegra: Fix sor1_out clock implementation by Thierry Reding · 7 years ago
  85. 1d7e2c8 clk: tegra: Use tegra_clk_register_periph_data() by Thierry Reding · 7 years ago
  86. 8be9519 clk: tegra: Add peripheral clock registration helper by Thierry Reding · 7 years ago
  87. 231ca2e clk: tegra: Check BPMP response return code by Timo Alho · 7 years ago
  88. 7157c69 clk: tegra: Fix Tegra210 PLLU initialization by Alex Frid · 7 years ago
  89. 71422db clk: tegra: Correct Tegra210 UTMIPLL poweron delay by Alex Frid · 7 years ago
  90. 2f924ac clk: tegra: Fix T210 PLLRE registration by Alex Frid · 7 years ago
  91. f7bdb8b clk: tegra: Update T210 PLLSS (D2/DP) registration by Alex Frid · 7 years ago
  92. ac99afe clk: tegra: Re-factor T210 PLLX registration by Alex Frid · 7 years ago
  93. 1934ffd clk: tegra: don't warn for pll_d2 defaults unnecessarily by Peter De Schrijver · 7 years ago
  94. 3dd065e clk: tegra: change post IDDQ release delay to 5us by Peter De Schrijver · 7 years ago
  95. 82c875c clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C by Alex Frid · 7 years ago
  96. a851ea2 clk: tegra: Fix T210 effective NDIV calculation by Alex Frid · 7 years ago
  97. bc7b34a clk: tegra: Init cfg structure in _get_pll_mnp by Peter De Schrijver · 7 years ago
  98. e34e69c clk: tegra210: remove non-existing VFIR clock by Peter De Schrijver · 7 years ago
  99. 030999f clk: tegra: disable SSC for PLL_D2 by Peter De Schrijver · 7 years ago
  100. 04434cf clk: tegra: Enable PLL_SS for Tegra210 by Peter De Schrijver · 7 years ago