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Suman Anna2ad51572018-07-11 18:42:11 -05001// SPDX-License-Identifier: GPL-2.0
Hiroshi DOYU340a6142006-12-07 15:43:59 -08002/*
3 * OMAP mailbox driver
4 *
Hiroshi DOYUf48cca82009-03-23 18:07:24 -07005 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
Suman Anna4899f78a2016-04-06 12:37:37 -05006 * Copyright (C) 2013-2016 Texas Instruments Incorporated - http://www.ti.com
Hiroshi DOYU340a6142006-12-07 15:43:59 -08007 *
Hiroshi DOYUf48cca82009-03-23 18:07:24 -07008 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Suman Anna5040f532014-06-24 19:43:41 -05009 * Suman Anna <s-anna@ti.com>
Hiroshi DOYU340a6142006-12-07 15:43:59 -080010 */
11
Hiroshi DOYU340a6142006-12-07 15:43:59 -080012#include <linux/interrupt.h>
Felipe Contrerasb3e69142010-06-11 15:51:49 +000013#include <linux/spinlock.h>
14#include <linux/mutex.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090015#include <linux/slab.h>
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +000016#include <linux/kfifo.h>
17#include <linux/err.h>
Paul Gortmaker73017a52011-07-31 16:14:14 -040018#include <linux/module.h>
Suman Anna75288cc2014-09-10 14:20:59 -050019#include <linux/of_device.h>
Suman Anna5040f532014-06-24 19:43:41 -050020#include <linux/platform_device.h>
21#include <linux/pm_runtime.h>
Suman Anna5040f532014-06-24 19:43:41 -050022#include <linux/omap-mailbox.h>
Suman Anna8841a662014-11-03 17:05:50 -060023#include <linux/mailbox_controller.h>
24#include <linux/mailbox_client.h>
Hiroshi DOYU8dff0fa2009-03-23 18:07:32 -070025
Dave Gerlach8e3c5952015-09-22 19:14:52 -050026#include "mailbox.h"
27
Suman Anna5040f532014-06-24 19:43:41 -050028#define MAILBOX_REVISION 0x000
29#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
30#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
31#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
Hiroshi DOYU340a6142006-12-07 15:43:59 -080032
Suman Anna5040f532014-06-24 19:43:41 -050033#define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
34#define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
35
36#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
37#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
38#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
39
40#define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \
41 OMAP2_MAILBOX_IRQSTATUS(u))
42#define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \
43 OMAP2_MAILBOX_IRQENABLE(u))
44#define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \
45 : OMAP2_MAILBOX_IRQENABLE(u))
46
47#define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
48#define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
49
Suman Anna4899f78a2016-04-06 12:37:37 -050050/* Interrupt register configuration types */
51#define MBOX_INTR_CFG_TYPE1 0
52#define MBOX_INTR_CFG_TYPE2 1
53
Suman Anna5040f532014-06-24 19:43:41 -050054struct omap_mbox_fifo {
55 unsigned long msg;
56 unsigned long fifo_stat;
57 unsigned long msg_stat;
Suman Anna5040f532014-06-24 19:43:41 -050058 unsigned long irqenable;
59 unsigned long irqstatus;
Suman Anna5040f532014-06-24 19:43:41 -050060 unsigned long irqdisable;
Suman Annabe3322e2014-06-24 19:43:42 -050061 u32 intr_bit;
Suman Anna5040f532014-06-24 19:43:41 -050062};
63
64struct omap_mbox_queue {
65 spinlock_t lock;
66 struct kfifo fifo;
67 struct work_struct work;
Suman Anna5040f532014-06-24 19:43:41 -050068 struct omap_mbox *mbox;
69 bool full;
70};
71
Suman Anna72c1c812014-06-24 19:43:43 -050072struct omap_mbox_device {
73 struct device *dev;
74 struct mutex cfg_lock;
75 void __iomem *mbox_base;
Suman Annaaf1d2f52016-04-06 18:37:18 -050076 u32 *irq_ctx;
Suman Anna72c1c812014-06-24 19:43:43 -050077 u32 num_users;
78 u32 num_fifos;
Suman Anna2240f8a2016-04-06 18:37:17 -050079 u32 intr_type;
Suman Anna72c1c812014-06-24 19:43:43 -050080 struct omap_mbox **mboxes;
Suman Anna8841a662014-11-03 17:05:50 -060081 struct mbox_controller controller;
Suman Anna72c1c812014-06-24 19:43:43 -050082 struct list_head elem;
83};
84
Suman Anna75288cc2014-09-10 14:20:59 -050085struct omap_mbox_fifo_info {
86 int tx_id;
87 int tx_usr;
88 int tx_irq;
89
90 int rx_id;
91 int rx_usr;
92 int rx_irq;
93
94 const char *name;
Dave Gerlach8e3c5952015-09-22 19:14:52 -050095 bool send_no_irq;
Suman Anna75288cc2014-09-10 14:20:59 -050096};
97
Suman Anna5040f532014-06-24 19:43:41 -050098struct omap_mbox {
99 const char *name;
100 int irq;
Suman Anna8841a662014-11-03 17:05:50 -0600101 struct omap_mbox_queue *rxq;
Suman Anna5040f532014-06-24 19:43:41 -0500102 struct device *dev;
Suman Anna72c1c812014-06-24 19:43:43 -0500103 struct omap_mbox_device *parent;
Suman Annabe3322e2014-06-24 19:43:42 -0500104 struct omap_mbox_fifo tx_fifo;
105 struct omap_mbox_fifo rx_fifo;
Suman Annabe3322e2014-06-24 19:43:42 -0500106 u32 intr_type;
Suman Anna8841a662014-11-03 17:05:50 -0600107 struct mbox_chan *chan;
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500108 bool send_no_irq;
Suman Anna5040f532014-06-24 19:43:41 -0500109};
110
Suman Anna72c1c812014-06-24 19:43:43 -0500111/* global variables for the mailbox devices */
112static DEFINE_MUTEX(omap_mbox_devices_lock);
113static LIST_HEAD(omap_mbox_devices);
C A Subramaniam5f00ec62009-11-22 10:11:22 -0800114
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000115static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
116module_param(mbox_kfifo_size, uint, S_IRUGO);
117MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
118
Suman Anna8841a662014-11-03 17:05:50 -0600119static struct omap_mbox *mbox_chan_to_omap_mbox(struct mbox_chan *chan)
120{
121 if (!chan || !chan->con_priv)
122 return NULL;
123
124 return (struct omap_mbox *)chan->con_priv;
125}
126
Suman Anna72c1c812014-06-24 19:43:43 -0500127static inline
128unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs)
Suman Anna5040f532014-06-24 19:43:41 -0500129{
Suman Anna72c1c812014-06-24 19:43:43 -0500130 return __raw_readl(mdev->mbox_base + ofs);
Suman Anna5040f532014-06-24 19:43:41 -0500131}
132
Suman Anna72c1c812014-06-24 19:43:43 -0500133static inline
134void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs)
Suman Anna5040f532014-06-24 19:43:41 -0500135{
Suman Anna72c1c812014-06-24 19:43:43 -0500136 __raw_writel(val, mdev->mbox_base + ofs);
Suman Anna5040f532014-06-24 19:43:41 -0500137}
138
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700139/* Mailbox FIFO handle functions */
Suman Anna5040f532014-06-24 19:43:41 -0500140static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700141{
Suman Annabe3322e2014-06-24 19:43:42 -0500142 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
Suman Anna2665a4c2016-04-06 12:37:40 -0500143
144 return (mbox_msg_t)mbox_read_reg(mbox->parent, fifo->msg);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700145}
Suman Anna5040f532014-06-24 19:43:41 -0500146
147static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700148{
Suman Annabe3322e2014-06-24 19:43:42 -0500149 struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
Suman Anna2665a4c2016-04-06 12:37:40 -0500150
Suman Anna72c1c812014-06-24 19:43:43 -0500151 mbox_write_reg(mbox->parent, msg, fifo->msg);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700152}
Suman Anna5040f532014-06-24 19:43:41 -0500153
154static int mbox_fifo_empty(struct omap_mbox *mbox)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700155{
Suman Annabe3322e2014-06-24 19:43:42 -0500156 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
Suman Anna2665a4c2016-04-06 12:37:40 -0500157
Suman Anna72c1c812014-06-24 19:43:43 -0500158 return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700159}
Suman Anna5040f532014-06-24 19:43:41 -0500160
161static int mbox_fifo_full(struct omap_mbox *mbox)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700162{
Suman Annabe3322e2014-06-24 19:43:42 -0500163 struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
Suman Anna2665a4c2016-04-06 12:37:40 -0500164
Suman Anna72c1c812014-06-24 19:43:43 -0500165 return mbox_read_reg(mbox->parent, fifo->fifo_stat);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700166}
167
168/* Mailbox IRQ handle functions */
Suman Anna5040f532014-06-24 19:43:41 -0500169static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700170{
Suman Annabe3322e2014-06-24 19:43:42 -0500171 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
172 &mbox->tx_fifo : &mbox->rx_fifo;
173 u32 bit = fifo->intr_bit;
174 u32 irqstatus = fifo->irqstatus;
Suman Anna5040f532014-06-24 19:43:41 -0500175
Suman Anna72c1c812014-06-24 19:43:43 -0500176 mbox_write_reg(mbox->parent, bit, irqstatus);
Suman Anna5040f532014-06-24 19:43:41 -0500177
178 /* Flush posted write for irq status to avoid spurious interrupts */
Suman Anna72c1c812014-06-24 19:43:43 -0500179 mbox_read_reg(mbox->parent, irqstatus);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700180}
Suman Anna5040f532014-06-24 19:43:41 -0500181
182static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700183{
Suman Annabe3322e2014-06-24 19:43:42 -0500184 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
185 &mbox->tx_fifo : &mbox->rx_fifo;
186 u32 bit = fifo->intr_bit;
187 u32 irqenable = fifo->irqenable;
188 u32 irqstatus = fifo->irqstatus;
189
Suman Anna72c1c812014-06-24 19:43:43 -0500190 u32 enable = mbox_read_reg(mbox->parent, irqenable);
191 u32 status = mbox_read_reg(mbox->parent, irqstatus);
Suman Anna5040f532014-06-24 19:43:41 -0500192
193 return (int)(enable & status & bit);
Hiroshi DOYU9ae0ee02009-03-23 18:07:26 -0700194}
195
Suman Anna8841a662014-11-03 17:05:50 -0600196static void _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
Suman Annac869c752013-03-12 17:55:29 -0500197{
Suman Annabe3322e2014-06-24 19:43:42 -0500198 u32 l;
199 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
200 &mbox->tx_fifo : &mbox->rx_fifo;
201 u32 bit = fifo->intr_bit;
202 u32 irqenable = fifo->irqenable;
Suman Anna5040f532014-06-24 19:43:41 -0500203
Suman Anna72c1c812014-06-24 19:43:43 -0500204 l = mbox_read_reg(mbox->parent, irqenable);
Suman Anna5040f532014-06-24 19:43:41 -0500205 l |= bit;
Suman Anna72c1c812014-06-24 19:43:43 -0500206 mbox_write_reg(mbox->parent, l, irqenable);
Suman Annac869c752013-03-12 17:55:29 -0500207}
Suman Annac869c752013-03-12 17:55:29 -0500208
Suman Anna8841a662014-11-03 17:05:50 -0600209static void _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
Suman Annac869c752013-03-12 17:55:29 -0500210{
Suman Annabe3322e2014-06-24 19:43:42 -0500211 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
212 &mbox->tx_fifo : &mbox->rx_fifo;
213 u32 bit = fifo->intr_bit;
214 u32 irqdisable = fifo->irqdisable;
Suman Anna5040f532014-06-24 19:43:41 -0500215
216 /*
217 * Read and update the interrupt configuration register for pre-OMAP4.
218 * OMAP4 and later SoCs have a dedicated interrupt disabling register.
219 */
Suman Annabe3322e2014-06-24 19:43:42 -0500220 if (!mbox->intr_type)
Suman Anna72c1c812014-06-24 19:43:43 -0500221 bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit;
Suman Anna5040f532014-06-24 19:43:41 -0500222
Suman Anna72c1c812014-06-24 19:43:43 -0500223 mbox_write_reg(mbox->parent, bit, irqdisable);
Suman Annac869c752013-03-12 17:55:29 -0500224}
Suman Annac869c752013-03-12 17:55:29 -0500225
Suman Anna8841a662014-11-03 17:05:50 -0600226void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800227{
Suman Anna8841a662014-11-03 17:05:50 -0600228 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800229
Suman Anna8841a662014-11-03 17:05:50 -0600230 if (WARN_ON(!mbox))
231 return;
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000232
Suman Anna8841a662014-11-03 17:05:50 -0600233 _omap_mbox_enable_irq(mbox, irq);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800234}
Suman Anna8841a662014-11-03 17:05:50 -0600235EXPORT_SYMBOL(omap_mbox_enable_irq);
236
237void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
238{
239 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
240
241 if (WARN_ON(!mbox))
242 return;
243
244 _omap_mbox_disable_irq(mbox, irq);
245}
246EXPORT_SYMBOL(omap_mbox_disable_irq);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800247
248/*
249 * Message receiver(workqueue)
250 */
251static void mbox_rx_work(struct work_struct *work)
252{
253 struct omap_mbox_queue *mq =
254 container_of(work, struct omap_mbox_queue, work);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800255 mbox_msg_t msg;
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000256 int len;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800257
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000258 while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
259 len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
260 WARN_ON(len != sizeof(msg));
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800261
Suman Anna8841a662014-11-03 17:05:50 -0600262 mbox_chan_received_data(mq->mbox->chan, (void *)msg);
Fernando Guzman Lugod2295042010-11-29 20:24:11 +0000263 spin_lock_irq(&mq->lock);
264 if (mq->full) {
265 mq->full = false;
Suman Anna8841a662014-11-03 17:05:50 -0600266 _omap_mbox_enable_irq(mq->mbox, IRQ_RX);
Fernando Guzman Lugod2295042010-11-29 20:24:11 +0000267 }
268 spin_unlock_irq(&mq->lock);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800269 }
270}
271
272/*
273 * Mailbox interrupt handler
274 */
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800275static void __mbox_tx_interrupt(struct omap_mbox *mbox)
276{
Suman Anna8841a662014-11-03 17:05:50 -0600277 _omap_mbox_disable_irq(mbox, IRQ_TX);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800278 ack_mbox_irq(mbox, IRQ_TX);
Suman Anna8841a662014-11-03 17:05:50 -0600279 mbox_chan_txdone(mbox->chan, 0);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800280}
281
282static void __mbox_rx_interrupt(struct omap_mbox *mbox)
283{
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000284 struct omap_mbox_queue *mq = mbox->rxq;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800285 mbox_msg_t msg;
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000286 int len;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800287
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800288 while (!mbox_fifo_empty(mbox)) {
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000289 if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
Suman Anna8841a662014-11-03 17:05:50 -0600290 _omap_mbox_disable_irq(mbox, IRQ_RX);
Fernando Guzman Lugod2295042010-11-29 20:24:11 +0000291 mq->full = true;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800292 goto nomem;
Fernando Guzman Lugo1ea5d6d2010-02-08 13:35:40 -0600293 }
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800294
295 msg = mbox_fifo_read(mbox);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800296
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000297 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
298 WARN_ON(len != sizeof(msg));
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800299 }
300
301 /* no more messages in the fifo. clear IRQ source. */
302 ack_mbox_irq(mbox, IRQ_RX);
Hiroshi DOYUf48cca82009-03-23 18:07:24 -0700303nomem:
Tejun Heoc4873002011-01-26 12:12:50 +0100304 schedule_work(&mbox->rxq->work);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800305}
306
307static irqreturn_t mbox_interrupt(int irq, void *p)
308{
Jeff Garzik2a7057e2007-10-26 05:40:22 -0400309 struct omap_mbox *mbox = p;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800310
311 if (is_mbox_irq(mbox, IRQ_TX))
312 __mbox_tx_interrupt(mbox);
313
314 if (is_mbox_irq(mbox, IRQ_RX))
315 __mbox_rx_interrupt(mbox);
316
317 return IRQ_HANDLED;
318}
319
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800320static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
Suman Anna8841a662014-11-03 17:05:50 -0600321 void (*work)(struct work_struct *))
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800322{
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800323 struct omap_mbox_queue *mq;
324
Suman Anna8841a662014-11-03 17:05:50 -0600325 if (!work)
326 return NULL;
327
Suman Anna86f6f5e2016-04-06 12:37:38 -0500328 mq = kzalloc(sizeof(*mq), GFP_KERNEL);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800329 if (!mq)
330 return NULL;
331
332 spin_lock_init(&mq->lock);
333
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000334 if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800335 goto error;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800336
Suman Anna8841a662014-11-03 17:05:50 -0600337 INIT_WORK(&mq->work, work);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800338 return mq;
Suman Anna8841a662014-11-03 17:05:50 -0600339
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800340error:
341 kfree(mq);
342 return NULL;
343}
344
345static void mbox_queue_free(struct omap_mbox_queue *q)
346{
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000347 kfifo_free(&q->fifo);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800348 kfree(q);
349}
350
Hiroshi DOYUc7c158e2009-11-22 10:11:19 -0800351static int omap_mbox_startup(struct omap_mbox *mbox)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800352{
C A Subramaniam5f00ec62009-11-22 10:11:22 -0800353 int ret = 0;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800354 struct omap_mbox_queue *mq;
355
Suman Anna8841a662014-11-03 17:05:50 -0600356 mq = mbox_queue_alloc(mbox, mbox_rx_work);
357 if (!mq)
358 return -ENOMEM;
359 mbox->rxq = mq;
360 mq->mbox = mbox;
C A Subramaniam5f00ec62009-11-22 10:11:22 -0800361
Suman Anna8841a662014-11-03 17:05:50 -0600362 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
363 mbox->name, mbox);
364 if (unlikely(ret)) {
365 pr_err("failed to register mailbox interrupt:%d\n", ret);
366 goto fail_request_irq;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800367 }
Suman Anna8841a662014-11-03 17:05:50 -0600368
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500369 if (mbox->send_no_irq)
370 mbox->chan->txdone_method = TXDONE_BY_ACK;
371
Suman Anna8841a662014-11-03 17:05:50 -0600372 _omap_mbox_enable_irq(mbox, IRQ_RX);
373
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800374 return 0;
375
Suman Annaecf305c2013-02-01 20:37:06 -0600376fail_request_irq:
377 mbox_queue_free(mbox->rxq);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800378 return ret;
379}
380
381static void omap_mbox_fini(struct omap_mbox *mbox)
382{
Suman Anna8841a662014-11-03 17:05:50 -0600383 _omap_mbox_disable_irq(mbox, IRQ_RX);
384 free_irq(mbox->irq, mbox);
385 flush_work(&mbox->rxq->work);
386 mbox_queue_free(mbox->rxq);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800387}
388
Suman Anna72c1c812014-06-24 19:43:43 -0500389static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev,
390 const char *mbox_name)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800391{
Kevin Hilmanc0377322011-02-11 19:56:43 +0000392 struct omap_mbox *_mbox, *mbox = NULL;
Suman Anna72c1c812014-06-24 19:43:43 -0500393 struct omap_mbox **mboxes = mdev->mboxes;
394 int i;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800395
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000396 if (!mboxes)
Suman Anna72c1c812014-06-24 19:43:43 -0500397 return NULL;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800398
Kevin Hilmanc0377322011-02-11 19:56:43 +0000399 for (i = 0; (_mbox = mboxes[i]); i++) {
Suman Anna72c1c812014-06-24 19:43:43 -0500400 if (!strcmp(_mbox->name, mbox_name)) {
Kevin Hilmanc0377322011-02-11 19:56:43 +0000401 mbox = _mbox;
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000402 break;
Kevin Hilmanc0377322011-02-11 19:56:43 +0000403 }
404 }
Suman Anna72c1c812014-06-24 19:43:43 -0500405 return mbox;
406}
407
Suman Anna8841a662014-11-03 17:05:50 -0600408struct mbox_chan *omap_mbox_request_channel(struct mbox_client *cl,
409 const char *chan_name)
Suman Anna72c1c812014-06-24 19:43:43 -0500410{
Suman Anna8841a662014-11-03 17:05:50 -0600411 struct device *dev = cl->dev;
Suman Anna72c1c812014-06-24 19:43:43 -0500412 struct omap_mbox *mbox = NULL;
413 struct omap_mbox_device *mdev;
Suman Anna8841a662014-11-03 17:05:50 -0600414 struct mbox_chan *chan;
415 unsigned long flags;
Suman Anna72c1c812014-06-24 19:43:43 -0500416 int ret;
417
Suman Anna8841a662014-11-03 17:05:50 -0600418 if (!dev)
419 return ERR_PTR(-ENODEV);
420
421 if (dev->of_node) {
422 pr_err("%s: please use mbox_request_channel(), this API is supported only for OMAP non-DT usage\n",
423 __func__);
424 return ERR_PTR(-ENODEV);
425 }
426
Suman Anna72c1c812014-06-24 19:43:43 -0500427 mutex_lock(&omap_mbox_devices_lock);
428 list_for_each_entry(mdev, &omap_mbox_devices, elem) {
Suman Anna8841a662014-11-03 17:05:50 -0600429 mbox = omap_mbox_device_find(mdev, chan_name);
Suman Anna72c1c812014-06-24 19:43:43 -0500430 if (mbox)
431 break;
432 }
433 mutex_unlock(&omap_mbox_devices_lock);
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000434
Suman Anna8841a662014-11-03 17:05:50 -0600435 if (!mbox || !mbox->chan)
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000436 return ERR_PTR(-ENOENT);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800437
Suman Anna8841a662014-11-03 17:05:50 -0600438 chan = mbox->chan;
439 spin_lock_irqsave(&chan->lock, flags);
440 chan->msg_free = 0;
441 chan->msg_count = 0;
442 chan->active_req = NULL;
443 chan->cl = cl;
444 init_completion(&chan->tx_complete);
445 spin_unlock_irqrestore(&chan->lock, flags);
Kanigeri, Hari58256302010-11-29 20:24:14 +0000446
Suman Anna8841a662014-11-03 17:05:50 -0600447 ret = chan->mbox->ops->startup(chan);
Juan Gutierrez1d8a0e92012-05-13 15:33:04 +0300448 if (ret) {
Suman Anna8841a662014-11-03 17:05:50 -0600449 pr_err("Unable to startup the chan (%d)\n", ret);
450 mbox_free_channel(chan);
451 chan = ERR_PTR(ret);
Juan Gutierrez1d8a0e92012-05-13 15:33:04 +0300452 }
453
Suman Anna8841a662014-11-03 17:05:50 -0600454 return chan;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800455}
Suman Anna8841a662014-11-03 17:05:50 -0600456EXPORT_SYMBOL(omap_mbox_request_channel);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800457
Hiroshi DOYU6b233982010-05-18 16:15:32 +0300458static struct class omap_mbox_class = { .name = "mbox", };
459
Suman Anna72c1c812014-06-24 19:43:43 -0500460static int omap_mbox_register(struct omap_mbox_device *mdev)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800461{
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000462 int ret;
463 int i;
Suman Anna72c1c812014-06-24 19:43:43 -0500464 struct omap_mbox **mboxes;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800465
Suman Anna72c1c812014-06-24 19:43:43 -0500466 if (!mdev || !mdev->mboxes)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800467 return -EINVAL;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800468
Suman Anna72c1c812014-06-24 19:43:43 -0500469 mboxes = mdev->mboxes;
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000470 for (i = 0; mboxes[i]; i++) {
471 struct omap_mbox *mbox = mboxes[i];
Suman Anna2665a4c2016-04-06 12:37:40 -0500472
Suman Anna8841a662014-11-03 17:05:50 -0600473 mbox->dev = device_create(&omap_mbox_class, mdev->dev,
474 0, mbox, "%s", mbox->name);
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000475 if (IS_ERR(mbox->dev)) {
476 ret = PTR_ERR(mbox->dev);
477 goto err_out;
478 }
Hiroshi DOYUf48cca82009-03-23 18:07:24 -0700479 }
Suman Anna72c1c812014-06-24 19:43:43 -0500480
481 mutex_lock(&omap_mbox_devices_lock);
482 list_add(&mdev->elem, &omap_mbox_devices);
483 mutex_unlock(&omap_mbox_devices_lock);
484
Suman Anna8841a662014-11-03 17:05:50 -0600485 ret = mbox_controller_register(&mdev->controller);
Hiroshi DOYUf48cca82009-03-23 18:07:24 -0700486
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000487err_out:
Suman Anna8841a662014-11-03 17:05:50 -0600488 if (ret) {
489 while (i--)
490 device_unregister(mboxes[i]->dev);
491 }
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800492 return ret;
493}
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800494
Suman Anna72c1c812014-06-24 19:43:43 -0500495static int omap_mbox_unregister(struct omap_mbox_device *mdev)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800496{
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000497 int i;
Suman Anna72c1c812014-06-24 19:43:43 -0500498 struct omap_mbox **mboxes;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800499
Suman Anna72c1c812014-06-24 19:43:43 -0500500 if (!mdev || !mdev->mboxes)
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000501 return -EINVAL;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800502
Suman Anna72c1c812014-06-24 19:43:43 -0500503 mutex_lock(&omap_mbox_devices_lock);
504 list_del(&mdev->elem);
505 mutex_unlock(&omap_mbox_devices_lock);
506
Suman Anna8841a662014-11-03 17:05:50 -0600507 mbox_controller_unregister(&mdev->controller);
508
Suman Anna72c1c812014-06-24 19:43:43 -0500509 mboxes = mdev->mboxes;
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000510 for (i = 0; mboxes[i]; i++)
511 device_unregister(mboxes[i]->dev);
Felipe Contreras9c80c8c2010-06-11 15:51:46 +0000512 return 0;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800513}
Suman Anna5040f532014-06-24 19:43:41 -0500514
Suman Anna8841a662014-11-03 17:05:50 -0600515static int omap_mbox_chan_startup(struct mbox_chan *chan)
516{
517 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
518 struct omap_mbox_device *mdev = mbox->parent;
519 int ret = 0;
520
521 mutex_lock(&mdev->cfg_lock);
522 pm_runtime_get_sync(mdev->dev);
523 ret = omap_mbox_startup(mbox);
524 if (ret)
525 pm_runtime_put_sync(mdev->dev);
526 mutex_unlock(&mdev->cfg_lock);
527 return ret;
528}
529
530static void omap_mbox_chan_shutdown(struct mbox_chan *chan)
531{
532 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
533 struct omap_mbox_device *mdev = mbox->parent;
534
535 mutex_lock(&mdev->cfg_lock);
536 omap_mbox_fini(mbox);
537 pm_runtime_put_sync(mdev->dev);
538 mutex_unlock(&mdev->cfg_lock);
539}
540
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500541static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, void *data)
Suman Anna8841a662014-11-03 17:05:50 -0600542{
Suman Anna8841a662014-11-03 17:05:50 -0600543 int ret = -EBUSY;
544
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500545 if (!mbox_fifo_full(mbox)) {
546 _omap_mbox_enable_irq(mbox, IRQ_RX);
547 mbox_fifo_write(mbox, (mbox_msg_t)data);
548 ret = 0;
549 _omap_mbox_disable_irq(mbox, IRQ_RX);
550
551 /* we must read and ack the interrupt directly from here */
552 mbox_fifo_read(mbox);
553 ack_mbox_irq(mbox, IRQ_RX);
554 }
555
556 return ret;
557}
558
559static int omap_mbox_chan_send(struct omap_mbox *mbox, void *data)
560{
561 int ret = -EBUSY;
Suman Anna8841a662014-11-03 17:05:50 -0600562
563 if (!mbox_fifo_full(mbox)) {
564 mbox_fifo_write(mbox, (mbox_msg_t)data);
565 ret = 0;
566 }
567
568 /* always enable the interrupt */
569 _omap_mbox_enable_irq(mbox, IRQ_TX);
570 return ret;
571}
572
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500573static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data)
574{
575 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
576 int ret;
577
578 if (!mbox)
579 return -EINVAL;
580
581 if (mbox->send_no_irq)
582 ret = omap_mbox_chan_send_noirq(mbox, data);
583 else
584 ret = omap_mbox_chan_send(mbox, data);
585
586 return ret;
587}
588
Andrew Bresticker05ae7972015-05-04 10:36:35 -0700589static const struct mbox_chan_ops omap_mbox_chan_ops = {
Suman Anna8841a662014-11-03 17:05:50 -0600590 .startup = omap_mbox_chan_startup,
591 .send_data = omap_mbox_chan_send_data,
592 .shutdown = omap_mbox_chan_shutdown,
593};
594
Suman Annaaf1d2f52016-04-06 18:37:18 -0500595#ifdef CONFIG_PM_SLEEP
596static int omap_mbox_suspend(struct device *dev)
597{
598 struct omap_mbox_device *mdev = dev_get_drvdata(dev);
Suman Anna9f0cee982016-04-06 18:37:19 -0500599 u32 usr, fifo, reg;
Suman Annaaf1d2f52016-04-06 18:37:18 -0500600
601 if (pm_runtime_status_suspended(dev))
602 return 0;
603
Suman Anna9f0cee982016-04-06 18:37:19 -0500604 for (fifo = 0; fifo < mdev->num_fifos; fifo++) {
605 if (mbox_read_reg(mdev, MAILBOX_MSGSTATUS(fifo))) {
606 dev_err(mdev->dev, "fifo %d has unexpected unread messages\n",
607 fifo);
608 return -EBUSY;
609 }
610 }
611
Suman Annaaf1d2f52016-04-06 18:37:18 -0500612 for (usr = 0; usr < mdev->num_users; usr++) {
613 reg = MAILBOX_IRQENABLE(mdev->intr_type, usr);
614 mdev->irq_ctx[usr] = mbox_read_reg(mdev, reg);
615 }
616
617 return 0;
618}
619
620static int omap_mbox_resume(struct device *dev)
621{
622 struct omap_mbox_device *mdev = dev_get_drvdata(dev);
623 u32 usr, reg;
624
625 if (pm_runtime_status_suspended(dev))
626 return 0;
627
628 for (usr = 0; usr < mdev->num_users; usr++) {
629 reg = MAILBOX_IRQENABLE(mdev->intr_type, usr);
630 mbox_write_reg(mdev, mdev->irq_ctx[usr], reg);
631 }
632
633 return 0;
634}
635#endif
636
637static const struct dev_pm_ops omap_mbox_pm_ops = {
638 SET_SYSTEM_SLEEP_PM_OPS(omap_mbox_suspend, omap_mbox_resume)
639};
640
Suman Anna75288cc2014-09-10 14:20:59 -0500641static const struct of_device_id omap_mailbox_of_match[] = {
642 {
643 .compatible = "ti,omap2-mailbox",
644 .data = (void *)MBOX_INTR_CFG_TYPE1,
645 },
646 {
647 .compatible = "ti,omap3-mailbox",
648 .data = (void *)MBOX_INTR_CFG_TYPE1,
649 },
650 {
651 .compatible = "ti,omap4-mailbox",
652 .data = (void *)MBOX_INTR_CFG_TYPE2,
653 },
654 {
655 /* end */
656 },
657};
658MODULE_DEVICE_TABLE(of, omap_mailbox_of_match);
659
Suman Anna8841a662014-11-03 17:05:50 -0600660static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller *controller,
661 const struct of_phandle_args *sp)
662{
663 phandle phandle = sp->args[0];
664 struct device_node *node;
665 struct omap_mbox_device *mdev;
666 struct omap_mbox *mbox;
667
668 mdev = container_of(controller, struct omap_mbox_device, controller);
669 if (WARN_ON(!mdev))
Benson Leung2d805fc2015-05-04 10:36:36 -0700670 return ERR_PTR(-EINVAL);
Suman Anna8841a662014-11-03 17:05:50 -0600671
672 node = of_find_node_by_phandle(phandle);
673 if (!node) {
674 pr_err("%s: could not find node phandle 0x%x\n",
675 __func__, phandle);
Benson Leung2d805fc2015-05-04 10:36:36 -0700676 return ERR_PTR(-ENODEV);
Suman Anna8841a662014-11-03 17:05:50 -0600677 }
678
679 mbox = omap_mbox_device_find(mdev, node->name);
680 of_node_put(node);
Benson Leung2d805fc2015-05-04 10:36:36 -0700681 return mbox ? mbox->chan : ERR_PTR(-ENOENT);
Suman Anna8841a662014-11-03 17:05:50 -0600682}
683
Suman Anna5040f532014-06-24 19:43:41 -0500684static int omap_mbox_probe(struct platform_device *pdev)
685{
686 struct resource *mem;
687 int ret;
Suman Anna8841a662014-11-03 17:05:50 -0600688 struct mbox_chan *chnls;
Suman Anna5040f532014-06-24 19:43:41 -0500689 struct omap_mbox **list, *mbox, *mboxblk;
Suman Anna75288cc2014-09-10 14:20:59 -0500690 struct omap_mbox_fifo_info *finfo, *finfoblk;
Suman Anna72c1c812014-06-24 19:43:43 -0500691 struct omap_mbox_device *mdev;
Suman Annabe3322e2014-06-24 19:43:42 -0500692 struct omap_mbox_fifo *fifo;
Suman Anna75288cc2014-09-10 14:20:59 -0500693 struct device_node *node = pdev->dev.of_node;
694 struct device_node *child;
695 const struct of_device_id *match;
696 u32 intr_type, info_count;
697 u32 num_users, num_fifos;
698 u32 tmp[3];
Suman Anna5040f532014-06-24 19:43:41 -0500699 u32 l;
700 int i;
701
Suman Anna4899f78a2016-04-06 12:37:37 -0500702 if (!node) {
703 pr_err("%s: only DT-based devices are supported\n", __func__);
Suman Anna5040f532014-06-24 19:43:41 -0500704 return -ENODEV;
705 }
706
Suman Anna4899f78a2016-04-06 12:37:37 -0500707 match = of_match_device(omap_mailbox_of_match, &pdev->dev);
708 if (!match)
709 return -ENODEV;
710 intr_type = (u32)match->data;
Suman Anna75288cc2014-09-10 14:20:59 -0500711
Suman Anna4899f78a2016-04-06 12:37:37 -0500712 if (of_property_read_u32(node, "ti,mbox-num-users", &num_users))
713 return -ENODEV;
Suman Anna75288cc2014-09-10 14:20:59 -0500714
Suman Anna4899f78a2016-04-06 12:37:37 -0500715 if (of_property_read_u32(node, "ti,mbox-num-fifos", &num_fifos))
716 return -ENODEV;
Suman Anna75288cc2014-09-10 14:20:59 -0500717
Suman Anna4899f78a2016-04-06 12:37:37 -0500718 info_count = of_get_available_child_count(node);
719 if (!info_count) {
720 dev_err(&pdev->dev, "no available mbox devices found\n");
721 return -ENODEV;
Suman Anna75288cc2014-09-10 14:20:59 -0500722 }
723
Kees Cooka86854d2018-06-12 14:07:58 -0700724 finfoblk = devm_kcalloc(&pdev->dev, info_count, sizeof(*finfoblk),
Suman Anna75288cc2014-09-10 14:20:59 -0500725 GFP_KERNEL);
726 if (!finfoblk)
727 return -ENOMEM;
728
729 finfo = finfoblk;
730 child = NULL;
731 for (i = 0; i < info_count; i++, finfo++) {
Suman Anna4899f78a2016-04-06 12:37:37 -0500732 child = of_get_next_available_child(node, child);
733 ret = of_property_read_u32_array(child, "ti,mbox-tx", tmp,
734 ARRAY_SIZE(tmp));
735 if (ret)
736 return ret;
737 finfo->tx_id = tmp[0];
738 finfo->tx_irq = tmp[1];
739 finfo->tx_usr = tmp[2];
Suman Anna75288cc2014-09-10 14:20:59 -0500740
Suman Anna4899f78a2016-04-06 12:37:37 -0500741 ret = of_property_read_u32_array(child, "ti,mbox-rx", tmp,
742 ARRAY_SIZE(tmp));
743 if (ret)
744 return ret;
745 finfo->rx_id = tmp[0];
746 finfo->rx_irq = tmp[1];
747 finfo->rx_usr = tmp[2];
Suman Anna75288cc2014-09-10 14:20:59 -0500748
Suman Anna4899f78a2016-04-06 12:37:37 -0500749 finfo->name = child->name;
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500750
Suman Anna4899f78a2016-04-06 12:37:37 -0500751 if (of_find_property(child, "ti,mbox-send-noirq", NULL))
752 finfo->send_no_irq = true;
753
Suman Anna75288cc2014-09-10 14:20:59 -0500754 if (finfo->tx_id >= num_fifos || finfo->rx_id >= num_fifos ||
755 finfo->tx_usr >= num_users || finfo->rx_usr >= num_users)
756 return -EINVAL;
757 }
758
Suman Anna72c1c812014-06-24 19:43:43 -0500759 mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
760 if (!mdev)
761 return -ENOMEM;
762
763 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
764 mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem);
765 if (IS_ERR(mdev->mbox_base))
766 return PTR_ERR(mdev->mbox_base);
767
Kees Cooka86854d2018-06-12 14:07:58 -0700768 mdev->irq_ctx = devm_kcalloc(&pdev->dev, num_users, sizeof(u32),
Suman Annaaf1d2f52016-04-06 18:37:18 -0500769 GFP_KERNEL);
770 if (!mdev->irq_ctx)
771 return -ENOMEM;
772
Suman Anna5040f532014-06-24 19:43:41 -0500773 /* allocate one extra for marking end of list */
Kees Cooka86854d2018-06-12 14:07:58 -0700774 list = devm_kcalloc(&pdev->dev, info_count + 1, sizeof(*list),
Suman Anna5040f532014-06-24 19:43:41 -0500775 GFP_KERNEL);
776 if (!list)
777 return -ENOMEM;
778
Kees Cooka86854d2018-06-12 14:07:58 -0700779 chnls = devm_kcalloc(&pdev->dev, info_count + 1, sizeof(*chnls),
Suman Anna8841a662014-11-03 17:05:50 -0600780 GFP_KERNEL);
781 if (!chnls)
782 return -ENOMEM;
783
Kees Cooka86854d2018-06-12 14:07:58 -0700784 mboxblk = devm_kcalloc(&pdev->dev, info_count, sizeof(*mbox),
Suman Anna5040f532014-06-24 19:43:41 -0500785 GFP_KERNEL);
786 if (!mboxblk)
787 return -ENOMEM;
788
Suman Anna5040f532014-06-24 19:43:41 -0500789 mbox = mboxblk;
Suman Anna75288cc2014-09-10 14:20:59 -0500790 finfo = finfoblk;
791 for (i = 0; i < info_count; i++, finfo++) {
Suman Annabe3322e2014-06-24 19:43:42 -0500792 fifo = &mbox->tx_fifo;
Suman Anna75288cc2014-09-10 14:20:59 -0500793 fifo->msg = MAILBOX_MESSAGE(finfo->tx_id);
794 fifo->fifo_stat = MAILBOX_FIFOSTATUS(finfo->tx_id);
795 fifo->intr_bit = MAILBOX_IRQ_NOTFULL(finfo->tx_id);
796 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->tx_usr);
797 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->tx_usr);
798 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->tx_usr);
Suman Anna5040f532014-06-24 19:43:41 -0500799
Suman Annabe3322e2014-06-24 19:43:42 -0500800 fifo = &mbox->rx_fifo;
Suman Anna75288cc2014-09-10 14:20:59 -0500801 fifo->msg = MAILBOX_MESSAGE(finfo->rx_id);
802 fifo->msg_stat = MAILBOX_MSGSTATUS(finfo->rx_id);
803 fifo->intr_bit = MAILBOX_IRQ_NEWMSG(finfo->rx_id);
804 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->rx_usr);
805 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr);
806 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr);
Suman Annabe3322e2014-06-24 19:43:42 -0500807
Dave Gerlach8e3c5952015-09-22 19:14:52 -0500808 mbox->send_no_irq = finfo->send_no_irq;
Suman Annabe3322e2014-06-24 19:43:42 -0500809 mbox->intr_type = intr_type;
810
Suman Anna72c1c812014-06-24 19:43:43 -0500811 mbox->parent = mdev;
Suman Anna75288cc2014-09-10 14:20:59 -0500812 mbox->name = finfo->name;
813 mbox->irq = platform_get_irq(pdev, finfo->tx_irq);
Suman Anna5040f532014-06-24 19:43:41 -0500814 if (mbox->irq < 0)
815 return mbox->irq;
Suman Anna8841a662014-11-03 17:05:50 -0600816 mbox->chan = &chnls[i];
817 chnls[i].con_priv = mbox;
Suman Anna5040f532014-06-24 19:43:41 -0500818 list[i] = mbox++;
819 }
820
Suman Anna72c1c812014-06-24 19:43:43 -0500821 mutex_init(&mdev->cfg_lock);
822 mdev->dev = &pdev->dev;
Suman Anna75288cc2014-09-10 14:20:59 -0500823 mdev->num_users = num_users;
824 mdev->num_fifos = num_fifos;
Suman Anna2240f8a2016-04-06 18:37:17 -0500825 mdev->intr_type = intr_type;
Suman Anna72c1c812014-06-24 19:43:43 -0500826 mdev->mboxes = list;
Suman Anna8841a662014-11-03 17:05:50 -0600827
828 /* OMAP does not have a Tx-Done IRQ, but rather a Tx-Ready IRQ */
829 mdev->controller.txdone_irq = true;
830 mdev->controller.dev = mdev->dev;
831 mdev->controller.ops = &omap_mbox_chan_ops;
832 mdev->controller.chans = chnls;
833 mdev->controller.num_chans = info_count;
834 mdev->controller.of_xlate = omap_mbox_of_xlate;
Suman Anna72c1c812014-06-24 19:43:43 -0500835 ret = omap_mbox_register(mdev);
Suman Anna5040f532014-06-24 19:43:41 -0500836 if (ret)
837 return ret;
838
Suman Anna72c1c812014-06-24 19:43:43 -0500839 platform_set_drvdata(pdev, mdev);
840 pm_runtime_enable(mdev->dev);
Suman Anna5040f532014-06-24 19:43:41 -0500841
Suman Anna72c1c812014-06-24 19:43:43 -0500842 ret = pm_runtime_get_sync(mdev->dev);
Suman Anna5040f532014-06-24 19:43:41 -0500843 if (ret < 0) {
Suman Anna72c1c812014-06-24 19:43:43 -0500844 pm_runtime_put_noidle(mdev->dev);
Suman Anna5040f532014-06-24 19:43:41 -0500845 goto unregister;
846 }
847
848 /*
849 * just print the raw revision register, the format is not
850 * uniform across all SoCs
851 */
Suman Anna72c1c812014-06-24 19:43:43 -0500852 l = mbox_read_reg(mdev, MAILBOX_REVISION);
853 dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l);
Suman Anna5040f532014-06-24 19:43:41 -0500854
Suman Anna72c1c812014-06-24 19:43:43 -0500855 ret = pm_runtime_put_sync(mdev->dev);
Suman Anna5040f532014-06-24 19:43:41 -0500856 if (ret < 0)
857 goto unregister;
858
Suman Anna75288cc2014-09-10 14:20:59 -0500859 devm_kfree(&pdev->dev, finfoblk);
Suman Anna5040f532014-06-24 19:43:41 -0500860 return 0;
861
862unregister:
Suman Anna72c1c812014-06-24 19:43:43 -0500863 pm_runtime_disable(mdev->dev);
864 omap_mbox_unregister(mdev);
Suman Anna5040f532014-06-24 19:43:41 -0500865 return ret;
866}
867
868static int omap_mbox_remove(struct platform_device *pdev)
869{
Suman Anna72c1c812014-06-24 19:43:43 -0500870 struct omap_mbox_device *mdev = platform_get_drvdata(pdev);
871
872 pm_runtime_disable(mdev->dev);
873 omap_mbox_unregister(mdev);
Suman Anna5040f532014-06-24 19:43:41 -0500874
875 return 0;
876}
877
878static struct platform_driver omap_mbox_driver = {
879 .probe = omap_mbox_probe,
880 .remove = omap_mbox_remove,
881 .driver = {
882 .name = "omap-mailbox",
Suman Annaaf1d2f52016-04-06 18:37:18 -0500883 .pm = &omap_mbox_pm_ops,
Suman Anna75288cc2014-09-10 14:20:59 -0500884 .of_match_table = of_match_ptr(omap_mailbox_of_match),
Suman Anna5040f532014-06-24 19:43:41 -0500885 },
886};
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800887
Hiroshi DOYUc7c158e2009-11-22 10:11:19 -0800888static int __init omap_mbox_init(void)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800889{
Hiroshi DOYU6b233982010-05-18 16:15:32 +0300890 int err;
891
892 err = class_register(&omap_mbox_class);
893 if (err)
894 return err;
895
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000896 /* kfifo size sanity check: alignment and minimal size */
897 mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
Kanigeri, Hariab66ac32010-11-29 20:24:12 +0000898 mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
899 sizeof(mbox_msg_t));
Ohad Ben-Cohenb5bebe42010-05-05 15:33:09 +0000900
Arvind Yadav1f90a2162017-11-11 23:39:18 +0530901 err = platform_driver_register(&omap_mbox_driver);
902 if (err)
903 class_unregister(&omap_mbox_class);
904
905 return err;
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800906}
Hiroshi DOYU6b233982010-05-18 16:15:32 +0300907subsys_initcall(omap_mbox_init);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800908
Hiroshi DOYUc7c158e2009-11-22 10:11:19 -0800909static void __exit omap_mbox_exit(void)
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800910{
Suman Anna5040f532014-06-24 19:43:41 -0500911 platform_driver_unregister(&omap_mbox_driver);
Hiroshi DOYU6b233982010-05-18 16:15:32 +0300912 class_unregister(&omap_mbox_class);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800913}
Hiroshi DOYUc7c158e2009-11-22 10:11:19 -0800914module_exit(omap_mbox_exit);
Hiroshi DOYU340a6142006-12-07 15:43:59 -0800915
Hiroshi DOYUf48cca82009-03-23 18:07:24 -0700916MODULE_LICENSE("GPL v2");
917MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
Ohad Ben-Cohenf3753252010-05-05 15:33:07 +0000918MODULE_AUTHOR("Toshihiro Kobayashi");
919MODULE_AUTHOR("Hiroshi DOYU");