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Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -03001/*
2 * NXP LPC18xx Watchdog Timer (WDT)
3 *
4 * Copyright (c) 2015 Ariel D'Alessandro <ariel@vanguardiasur.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 *
10 * Notes
11 * -----
12 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit
13 * counter which decrements on every clock cycle.
14 */
15
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/platform_device.h>
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -030021#include <linux/watchdog.h>
22
23/* Registers */
24#define LPC18XX_WDT_MOD 0x00
25#define LPC18XX_WDT_MOD_WDEN BIT(0)
26#define LPC18XX_WDT_MOD_WDRESET BIT(1)
27
28#define LPC18XX_WDT_TC 0x04
29#define LPC18XX_WDT_TC_MIN 0xff
30#define LPC18XX_WDT_TC_MAX 0xffffff
31
32#define LPC18XX_WDT_FEED 0x08
33#define LPC18XX_WDT_FEED_MAGIC1 0xaa
34#define LPC18XX_WDT_FEED_MAGIC2 0x55
35
36#define LPC18XX_WDT_TV 0x0c
37
38/* Clock pre-scaler */
39#define LPC18XX_WDT_CLK_DIV 4
40
41/* Timeout values in seconds */
42#define LPC18XX_WDT_DEF_TIMEOUT 30U
43
44static int heartbeat;
45module_param(heartbeat, int, 0);
46MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds (default="
47 __MODULE_STRING(LPC18XX_WDT_DEF_TIMEOUT) ")");
48
49static bool nowayout = WATCHDOG_NOWAYOUT;
50module_param(nowayout, bool, 0);
51MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
52 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
53
54struct lpc18xx_wdt_dev {
55 struct watchdog_device wdt_dev;
56 struct clk *reg_clk;
57 struct clk *wdt_clk;
58 unsigned long clk_rate;
59 void __iomem *base;
60 struct timer_list timer;
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -030061 spinlock_t lock;
62};
63
64static int lpc18xx_wdt_feed(struct watchdog_device *wdt_dev)
65{
66 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
67 unsigned long flags;
68
69 /*
70 * An abort condition will occur if an interrupt happens during the feed
71 * sequence.
72 */
73 spin_lock_irqsave(&lpc18xx_wdt->lock, flags);
74 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
75 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
76 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags);
77
78 return 0;
79}
80
Kees Cookd1cadcb2017-09-12 16:14:07 -070081static void lpc18xx_wdt_timer_feed(struct timer_list *t)
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -030082{
Kees Cookd1cadcb2017-09-12 16:14:07 -070083 struct lpc18xx_wdt_dev *lpc18xx_wdt = from_timer(lpc18xx_wdt, t, timer);
84 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev;
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -030085
86 lpc18xx_wdt_feed(wdt_dev);
87
88 /* Use safe value (1/2 of real timeout) */
89 mod_timer(&lpc18xx_wdt->timer, jiffies +
90 msecs_to_jiffies((wdt_dev->timeout * MSEC_PER_SEC) / 2));
91}
92
93/*
94 * Since LPC18xx Watchdog cannot be disabled in hardware, we must keep feeding
95 * it with a timer until userspace watchdog software takes over.
96 */
97static int lpc18xx_wdt_stop(struct watchdog_device *wdt_dev)
98{
Kees Cookd1cadcb2017-09-12 16:14:07 -070099 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
100
101 lpc18xx_wdt_timer_feed(&lpc18xx_wdt->timer);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300102
103 return 0;
104}
105
106static void __lpc18xx_wdt_set_timeout(struct lpc18xx_wdt_dev *lpc18xx_wdt)
107{
108 unsigned int val;
109
110 val = DIV_ROUND_UP(lpc18xx_wdt->wdt_dev.timeout * lpc18xx_wdt->clk_rate,
111 LPC18XX_WDT_CLK_DIV);
112 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_TC);
113}
114
115static int lpc18xx_wdt_set_timeout(struct watchdog_device *wdt_dev,
116 unsigned int new_timeout)
117{
118 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
119
120 lpc18xx_wdt->wdt_dev.timeout = new_timeout;
121 __lpc18xx_wdt_set_timeout(lpc18xx_wdt);
122
123 return 0;
124}
125
Fengguang Wu6cd8a1b2015-08-07 10:28:40 -0700126static unsigned int lpc18xx_wdt_get_timeleft(struct watchdog_device *wdt_dev)
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300127{
128 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
129 unsigned int val;
130
131 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_TV);
132 return (val * LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate;
133}
134
135static int lpc18xx_wdt_start(struct watchdog_device *wdt_dev)
136{
137 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
138 unsigned int val;
139
140 if (timer_pending(&lpc18xx_wdt->timer))
141 del_timer(&lpc18xx_wdt->timer);
142
143 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
144 val |= LPC18XX_WDT_MOD_WDEN;
145 val |= LPC18XX_WDT_MOD_WDRESET;
146 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
147
148 /*
149 * Setting the WDEN bit in the WDMOD register is not sufficient to
150 * enable the Watchdog. A valid feed sequence must be completed after
151 * setting WDEN before the Watchdog is capable of generating a reset.
152 */
153 lpc18xx_wdt_feed(wdt_dev);
154
155 return 0;
156}
157
Guenter Roeck4d8b2292016-02-26 17:32:49 -0800158static int lpc18xx_wdt_restart(struct watchdog_device *wdt_dev,
159 unsigned long action, void *data)
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300160{
Damien Riegel2de4e5a2015-11-16 12:28:05 -0500161 struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300162 unsigned long flags;
163 int val;
164
165 /*
166 * Incorrect feed sequence causes immediate watchdog reset if enabled.
167 */
168 spin_lock_irqsave(&lpc18xx_wdt->lock, flags);
169
170 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
171 val |= LPC18XX_WDT_MOD_WDEN;
172 val |= LPC18XX_WDT_MOD_WDRESET;
173 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
174
175 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
176 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
177
178 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
179 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
180
181 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags);
182
Damien Riegel2de4e5a2015-11-16 12:28:05 -0500183 return 0;
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300184}
185
Bhumika Goyal6c368932016-12-26 22:35:11 +0530186static const struct watchdog_info lpc18xx_wdt_info = {
Damien Riegel2de4e5a2015-11-16 12:28:05 -0500187 .identity = "NXP LPC18xx Watchdog",
188 .options = WDIOF_SETTIMEOUT |
189 WDIOF_KEEPALIVEPING |
190 WDIOF_MAGICCLOSE,
191};
192
193static const struct watchdog_ops lpc18xx_wdt_ops = {
194 .owner = THIS_MODULE,
195 .start = lpc18xx_wdt_start,
196 .stop = lpc18xx_wdt_stop,
197 .ping = lpc18xx_wdt_feed,
198 .set_timeout = lpc18xx_wdt_set_timeout,
199 .get_timeleft = lpc18xx_wdt_get_timeleft,
200 .restart = lpc18xx_wdt_restart,
201};
202
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300203static int lpc18xx_wdt_probe(struct platform_device *pdev)
204{
205 struct lpc18xx_wdt_dev *lpc18xx_wdt;
206 struct device *dev = &pdev->dev;
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300207 int ret;
208
209 lpc18xx_wdt = devm_kzalloc(dev, sizeof(*lpc18xx_wdt), GFP_KERNEL);
210 if (!lpc18xx_wdt)
211 return -ENOMEM;
212
Guenter Roeck0f0a6a22019-04-02 12:01:53 -0700213 lpc18xx_wdt->base = devm_platform_ioremap_resource(pdev, 0);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300214 if (IS_ERR(lpc18xx_wdt->base))
215 return PTR_ERR(lpc18xx_wdt->base);
216
217 lpc18xx_wdt->reg_clk = devm_clk_get(dev, "reg");
218 if (IS_ERR(lpc18xx_wdt->reg_clk)) {
219 dev_err(dev, "failed to get the reg clock\n");
220 return PTR_ERR(lpc18xx_wdt->reg_clk);
221 }
222
223 lpc18xx_wdt->wdt_clk = devm_clk_get(dev, "wdtclk");
224 if (IS_ERR(lpc18xx_wdt->wdt_clk)) {
225 dev_err(dev, "failed to get the wdt clock\n");
226 return PTR_ERR(lpc18xx_wdt->wdt_clk);
227 }
228
229 ret = clk_prepare_enable(lpc18xx_wdt->reg_clk);
230 if (ret) {
231 dev_err(dev, "could not prepare or enable sys clock\n");
232 return ret;
233 }
234
235 ret = clk_prepare_enable(lpc18xx_wdt->wdt_clk);
236 if (ret) {
237 dev_err(dev, "could not prepare or enable wdt clock\n");
238 goto disable_reg_clk;
239 }
240
241 /* We use the clock rate to calculate timeouts */
242 lpc18xx_wdt->clk_rate = clk_get_rate(lpc18xx_wdt->wdt_clk);
243 if (lpc18xx_wdt->clk_rate == 0) {
244 dev_err(dev, "failed to get clock rate\n");
245 ret = -EINVAL;
246 goto disable_wdt_clk;
247 }
248
249 lpc18xx_wdt->wdt_dev.info = &lpc18xx_wdt_info;
250 lpc18xx_wdt->wdt_dev.ops = &lpc18xx_wdt_ops;
251
252 lpc18xx_wdt->wdt_dev.min_timeout = DIV_ROUND_UP(LPC18XX_WDT_TC_MIN *
253 LPC18XX_WDT_CLK_DIV, lpc18xx_wdt->clk_rate);
254
255 lpc18xx_wdt->wdt_dev.max_timeout = (LPC18XX_WDT_TC_MAX *
256 LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate;
257
258 lpc18xx_wdt->wdt_dev.timeout = min(lpc18xx_wdt->wdt_dev.max_timeout,
259 LPC18XX_WDT_DEF_TIMEOUT);
260
261 spin_lock_init(&lpc18xx_wdt->lock);
262
263 lpc18xx_wdt->wdt_dev.parent = dev;
264 watchdog_set_drvdata(&lpc18xx_wdt->wdt_dev, lpc18xx_wdt);
265
Marcus Folkessondf6af782018-02-10 21:36:23 +0100266 watchdog_init_timeout(&lpc18xx_wdt->wdt_dev, heartbeat, dev);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300267
268 __lpc18xx_wdt_set_timeout(lpc18xx_wdt);
269
Kees Cookd1cadcb2017-09-12 16:14:07 -0700270 timer_setup(&lpc18xx_wdt->timer, lpc18xx_wdt_timer_feed, 0);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300271
272 watchdog_set_nowayout(&lpc18xx_wdt->wdt_dev, nowayout);
Damien Riegel2de4e5a2015-11-16 12:28:05 -0500273 watchdog_set_restart_priority(&lpc18xx_wdt->wdt_dev, 128);
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300274
275 platform_set_drvdata(pdev, lpc18xx_wdt);
276
277 ret = watchdog_register_device(&lpc18xx_wdt->wdt_dev);
278 if (ret)
279 goto disable_wdt_clk;
280
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300281 return 0;
282
283disable_wdt_clk:
284 clk_disable_unprepare(lpc18xx_wdt->wdt_clk);
285disable_reg_clk:
286 clk_disable_unprepare(lpc18xx_wdt->reg_clk);
287 return ret;
288}
289
290static void lpc18xx_wdt_shutdown(struct platform_device *pdev)
291{
292 struct lpc18xx_wdt_dev *lpc18xx_wdt = platform_get_drvdata(pdev);
293
294 lpc18xx_wdt_stop(&lpc18xx_wdt->wdt_dev);
295}
296
297static int lpc18xx_wdt_remove(struct platform_device *pdev)
298{
299 struct lpc18xx_wdt_dev *lpc18xx_wdt = platform_get_drvdata(pdev);
300
Ariel D'Alessandro7c25f8c2015-08-01 15:37:16 -0300301 dev_warn(&pdev->dev, "I quit now, hardware will probably reboot!\n");
302 del_timer(&lpc18xx_wdt->timer);
303
304 watchdog_unregister_device(&lpc18xx_wdt->wdt_dev);
305 clk_disable_unprepare(lpc18xx_wdt->wdt_clk);
306 clk_disable_unprepare(lpc18xx_wdt->reg_clk);
307
308 return 0;
309}
310
311static const struct of_device_id lpc18xx_wdt_match[] = {
312 { .compatible = "nxp,lpc1850-wwdt" },
313 {}
314};
315MODULE_DEVICE_TABLE(of, lpc18xx_wdt_match);
316
317static struct platform_driver lpc18xx_wdt_driver = {
318 .driver = {
319 .name = "lpc18xx-wdt",
320 .of_match_table = lpc18xx_wdt_match,
321 },
322 .probe = lpc18xx_wdt_probe,
323 .remove = lpc18xx_wdt_remove,
324 .shutdown = lpc18xx_wdt_shutdown,
325};
326module_platform_driver(lpc18xx_wdt_driver);
327
328MODULE_AUTHOR("Ariel D'Alessandro <ariel@vanguardiasur.com.ar>");
329MODULE_DESCRIPTION("NXP LPC18xx Watchdog Timer Driver");
330MODULE_LICENSE("GPL v2");