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Thomas Abraham0561cea2011-11-02 19:31:15 +09001/*
2 * Samsung's Exynos4210 SoC device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
10 * based board files can include this file and provide values for board specfic
11 * bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20*/
21
Padmavathi Venna37992792013-06-18 00:02:08 +090022#include "exynos4.dtsi"
23#include "exynos4210-pinctrl.dtsi"
Thomas Abraham0561cea2011-11-02 19:31:15 +090024
25/ {
Sachin Kamat8bdb31b2014-03-21 02:17:22 +090026 compatible = "samsung,exynos4210", "samsung,exynos4";
Thomas Abraham0561cea2011-11-02 19:31:15 +090027
Thomas Abraham4980c392012-07-14 10:45:32 +090028 aliases {
Thomas Abraham87711d82012-09-07 06:14:26 +090029 pinctrl0 = &pinctrl_0;
30 pinctrl1 = &pinctrl_1;
31 pinctrl2 = &pinctrl_2;
Thomas Abraham4980c392012-07-14 10:45:32 +090032 };
33
Sachin Kamatb3205de2014-05-13 07:13:44 +090034 sysram@02020000 {
35 compatible = "mmio-sram";
36 reg = <0x02020000 0x20000>;
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0 0x02020000 0x20000>;
40
41 smp-sysram@0 {
42 compatible = "samsung,exynos4210-sysram";
43 reg = <0x0 0x1000>;
44 };
45
46 smp-sysram@1f000 {
47 compatible = "samsung,exynos4210-sysram-ns";
48 reg = <0x1f000 0x1000>;
49 };
50 };
51
Tomasz Figa91d88f02012-11-22 00:22:09 +090052 pd_lcd1: lcd1-power-domain@10023CA0 {
53 compatible = "samsung,exynos4210-pd";
54 reg = <0x10023CA0 0x20>;
55 };
56
Tomasz Figa0572b722013-12-19 03:17:54 +090057 gic: interrupt-controller@10490000 {
Thomas Abrahamda911782012-02-08 11:42:43 +090058 cpu-offset = <0x8000>;
Thomas Abraham0561cea2011-11-02 19:31:15 +090059 };
60
Tomasz Figa0572b722013-12-19 03:17:54 +090061 combiner: interrupt-controller@10440000 {
Arnd Bergmann30269dd2013-04-12 15:15:58 +020062 samsung,combiner-nr = <16>;
Thomas Abraham49229722012-07-13 15:25:08 +090063 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
64 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
65 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
66 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
67 };
68
Thomas Abrahambbd97002013-03-09 16:12:35 +090069 mct@10050000 {
70 compatible = "samsung,exynos4210-mct";
71 reg = <0x10050000 0x800>;
Thomas Abrahambbd97002013-03-09 16:12:35 +090072 interrupt-parent = <&mct_map>;
Tomasz Figa84ee1c152013-12-19 03:17:49 +090073 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
Andrzej Hajda1c75a782014-02-26 09:53:30 +090074 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Thomas Abraham7ad34332013-03-09 17:11:38 +090075 clock-names = "fin_pll", "mct";
Thomas Abrahambbd97002013-03-09 16:12:35 +090076
77 mct_map: mct-map {
Tomasz Figa84ee1c152013-12-19 03:17:49 +090078 #interrupt-cells = <1>;
Thomas Abrahambbd97002013-03-09 16:12:35 +090079 #address-cells = <0>;
80 #size-cells = <0>;
Tomasz Figa84ee1c152013-12-19 03:17:49 +090081 interrupt-map = <0 &gic 0 57 0>,
82 <1 &gic 0 69 0>,
83 <2 &combiner 12 6>,
84 <3 &combiner 12 7>,
85 <4 &gic 0 42 0>,
86 <5 &gic 0 48 0>;
Thomas Abrahambbd97002013-03-09 16:12:35 +090087 };
88 };
89
Lee Jonese7787aed2013-08-06 03:04:43 +090090 clock: clock-controller@10030000 {
Thomas Abrahamd8bafc82013-03-09 17:11:33 +090091 compatible = "samsung,exynos4210-clock";
92 reg = <0x10030000 0x20000>;
93 #clock-cells = <1>;
94 };
95
Chanho Parkdb352342012-12-12 14:04:03 +090096 pmu {
97 compatible = "arm,cortex-a9-pmu";
98 interrupt-parent = <&combiner>;
99 interrupts = <2 2>, <3 2>;
100 };
101
Thomas Abraham87711d82012-09-07 06:14:26 +0900102 pinctrl_0: pinctrl@11400000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800103 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +0900104 reg = <0x11400000 0x1000>;
105 interrupts = <0 47 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +0900106 };
107
108 pinctrl_1: pinctrl@11000000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800109 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +0900110 reg = <0x11000000 0x1000>;
111 interrupts = <0 46 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +0900112
113 wakup_eint: wakeup-interrupt-controller {
114 compatible = "samsung,exynos4210-wakeup-eint";
115 interrupt-parent = <&gic>;
Tomasz Figaa04b07c2012-10-11 10:11:18 +0200116 interrupts = <0 32 0>;
Thomas Abraham87711d82012-09-07 06:14:26 +0900117 };
118 };
119
120 pinctrl_2: pinctrl@03860000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800121 compatible = "samsung,exynos4210-pinctrl";
Thomas Abraham87711d82012-09-07 06:14:26 +0900122 reg = <0x03860000 0x1000>;
123 };
124
Amit Daniel Kachhap8d4155d2012-10-29 21:18:01 +0900125 tmu@100C0000 {
126 compatible = "samsung,exynos4210-tmu";
127 interrupt-parent = <&combiner>;
128 reg = <0x100C0000 0x100>;
129 interrupts = <2 4>;
Andrzej Hajda1c75a782014-02-26 09:53:30 +0900130 clocks = <&clock CLK_TMU_APBIF>;
Sachin Kamate6199af2013-04-23 23:20:19 +0900131 clock-names = "tmu_apbif";
132 status = "disabled";
Amit Daniel Kachhap8d4155d2012-10-29 21:18:01 +0900133 };
Sachin Kamat66d302a2013-04-04 13:48:45 +0900134
135 g2d@12800000 {
136 compatible = "samsung,s5pv210-g2d";
137 reg = <0x12800000 0x1000>;
138 interrupts = <0 89 0>;
Andrzej Hajda1c75a782014-02-26 09:53:30 +0900139 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
Sachin Kamat37bf5792013-06-10 17:52:24 +0900140 clock-names = "sclk_fimg2d", "fimg2d";
Sachin Kamat66d302a2013-04-04 13:48:45 +0900141 status = "disabled";
142 };
Sylwester Nawrocki54a88962013-08-06 02:49:45 +0900143
144 camera {
Andrzej Hajda1c75a782014-02-26 09:53:30 +0900145 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
146 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
Sylwester Nawrocki54a88962013-08-06 02:49:45 +0900147 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
148
149 fimc_0: fimc@11800000 {
150 samsung,pix-limits = <4224 8192 1920 4224>;
151 samsung,mainscaler-ext;
152 samsung,cam-if;
153 };
154
155 fimc_1: fimc@11810000 {
156 samsung,pix-limits = <4224 8192 1920 4224>;
157 samsung,mainscaler-ext;
158 samsung,cam-if;
159 };
160
161 fimc_2: fimc@11820000 {
162 samsung,pix-limits = <4224 8192 1920 4224>;
163 samsung,mainscaler-ext;
164 samsung,lcd-wb;
165 };
166
167 fimc_3: fimc@11830000 {
168 samsung,pix-limits = <1920 8192 1366 1920>;
169 samsung,rotators = <0>;
170 samsung,mainscaler-ext;
171 samsung,lcd-wb;
172 };
173 };
Thomas Abraham0561cea2011-11-02 19:31:15 +0900174};