blob: 76e37455480e003266bf4c972f41ab9e6e55ff55 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
12 *
13 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
14 * ingmar@gonzo.schwaben.de
15 *
16 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
17 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
18 *
19 * Added ISAPNP support for DTC436 adapters,
20 * Thomas Sailer, sailer@ife.ee.ethz.ch
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Finn Thain9c41ab22016-03-23 21:10:28 +110022 * See Documentation/scsi/g_NCR5380.txt for more info.
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 */
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/blkdev.h>
Finn Thain161c0052016-01-03 16:05:46 +110027#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <scsi/scsi_host.h>
29#include "g_NCR5380.h"
30#include "NCR5380.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/init.h>
32#include <linux/ioport.h>
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020033#include <linux/isa.h>
34#include <linux/pnp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/interrupt.h>
36
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020037#define MAX_CARDS 8
38
39/* old-style parameters for compatibility */
Finn Thainc0965e62016-01-03 16:05:05 +110040static int ncr_irq;
Finn Thainc0965e62016-01-03 16:05:05 +110041static int ncr_addr;
42static int ncr_5380;
43static int ncr_53c400;
44static int ncr_53c400a;
45static int dtc_3181e;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110046static int hp_c2502;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020047module_param(ncr_irq, int, 0);
48module_param(ncr_addr, int, 0);
49module_param(ncr_5380, int, 0);
50module_param(ncr_53c400, int, 0);
51module_param(ncr_53c400a, int, 0);
52module_param(dtc_3181e, int, 0);
53module_param(hp_c2502, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020055static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
56module_param_array(irq, int, NULL, 0);
57MODULE_PARM_DESC(irq, "IRQ number(s)");
58
59static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
60module_param_array(base, int, NULL, 0);
61MODULE_PARM_DESC(base, "base address(es)");
62
63static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64module_param_array(card, int, NULL, 0);
65MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
66
Ondrej Zaryb61bacb2016-10-10 00:46:52 -040067MODULE_ALIAS("g_NCR5380_mmio");
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020068MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110070/*
71 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
72 * to ports 0x779 and 0x379.
73 */
74static void magic_configure(int idx, u8 irq, u8 magic[])
75{
76 u8 cfg = 0;
77
78 outb(magic[0], 0x779);
79 outb(magic[1], 0x379);
80 outb(magic[2], 0x379);
81 outb(magic[3], 0x379);
82 outb(magic[4], 0x379);
83
84 /* allowed IRQs for HP C2502 */
85 if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
86 irq = 0;
87 if (idx >= 0 && idx <= 7)
88 cfg = 0x80 | idx | (irq << 4);
89 outb(cfg, 0x379);
90}
Ondrej Zaryb61bacb2016-10-10 00:46:52 -040091
92static unsigned int ncr_53c400a_ports[] = {
93 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
94};
95static unsigned int dtc_3181e_ports[] = {
96 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
97};
98static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
99 0x59, 0xb9, 0xc5, 0xae, 0xa6
100};
101static u8 hp_c2502_magic[] = { /* HP C2502 */
102 0x0f, 0x22, 0xf0, 0x20, 0x80
103};
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100104
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200105static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
106 struct device *pdev, int base, int irq, int board)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400108 bool is_pmio = base <= 0xffff;
109 int ret;
110 int flags = 0;
111 unsigned int *ports = NULL;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100112 u8 *magic = NULL;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700113 int i;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100114 int port_idx = -1;
Finn Thain9d376402016-03-23 21:10:10 +1100115 unsigned long region_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 struct Scsi_Host *instance;
Ondrej Zary12150792016-01-03 16:06:15 +1100117 struct NCR5380_hostdata *hostdata;
Finn Thain820682b2016-10-10 00:46:53 -0400118 u8 __iomem *iomem;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200120 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200121 case BOARD_NCR5380:
122 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
123 break;
124 case BOARD_NCR53C400A:
125 ports = ncr_53c400a_ports;
126 magic = ncr_53c400a_magic;
127 break;
128 case BOARD_HP_C2502:
129 ports = ncr_53c400a_ports;
130 magic = hp_c2502_magic;
131 break;
132 case BOARD_DTC3181E:
133 ports = dtc_3181e_ports;
134 magic = ncr_53c400a_magic;
135 break;
136 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400138 if (is_pmio && ports && magic) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200139 /* wakeup sequence for the NCR53C400A and DTC3181E */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200141 /* Disable the adapter and look for a free io port */
142 magic_configure(-1, 0, magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200144 region_size = 16;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200145 if (base)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200146 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200147 if (base == ports[i]) { /* index found */
148 if (!request_region(ports[i],
149 region_size,
150 "ncr53c80"))
151 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200152 break;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200153 }
154 }
155 else
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200156 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200157 if (!request_region(ports[i], region_size,
158 "ncr53c80"))
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200159 continue;
160 if (inb(ports[i]) == 0xff)
161 break;
162 release_region(ports[i], region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200164 if (ports[i]) {
165 /* At this point we have our region reserved */
166 magic_configure(i, 0, magic); /* no IRQ yet */
Ondrej Zary7b93ca42016-11-11 10:00:20 +1100167 base = ports[i];
168 outb(0xc0, base + 9);
169 if (inb(base + 9) != 0x80) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200170 ret = -ENODEV;
171 goto out_release;
172 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200173 port_idx = i;
174 } else
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200175 return -EINVAL;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400176 } else if (is_pmio) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200177 /* NCR5380 - no configuration, just grab */
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200178 region_size = 8;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200179 if (!base || !request_region(base, region_size, "ncr5380"))
180 return -EBUSY;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400181 } else { /* MMIO */
182 region_size = NCR53C400_region_size;
183 if (!request_mem_region(base, region_size, "ncr5380"))
184 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200185 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400186
187 if (is_pmio)
188 iomem = ioport_map(base, region_size);
189 else
190 iomem = ioremap(base, region_size);
191
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200192 if (!iomem) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200193 ret = -ENOMEM;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200194 goto out_release;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200195 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400196
197 instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
198 if (instance == NULL) {
199 ret = -ENOMEM;
200 goto out_unmap;
201 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200202 hostdata = shost_priv(instance);
203
Finn Thain820682b2016-10-10 00:46:53 -0400204 hostdata->io = iomem;
205 hostdata->region_size = region_size;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400206
207 if (is_pmio) {
Finn Thain820682b2016-10-10 00:46:53 -0400208 hostdata->io_port = base;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400209 hostdata->io_width = 1; /* 8-bit PDMA by default */
210 hostdata->offset = 0;
211
212 /*
213 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
214 * the base address.
215 */
216 switch (board) {
217 case BOARD_NCR53C400:
Finn Thain820682b2016-10-10 00:46:53 -0400218 hostdata->io_port += 8;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400219 hostdata->c400_ctl_status = 0;
220 hostdata->c400_blk_cnt = 1;
221 hostdata->c400_host_buf = 4;
222 break;
223 case BOARD_DTC3181E:
224 hostdata->io_width = 2; /* 16-bit PDMA */
225 /* fall through */
226 case BOARD_NCR53C400A:
227 case BOARD_HP_C2502:
228 hostdata->c400_ctl_status = 9;
229 hostdata->c400_blk_cnt = 10;
230 hostdata->c400_host_buf = 8;
231 break;
232 }
233 } else {
Finn Thain820682b2016-10-10 00:46:53 -0400234 hostdata->base = base;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400235 hostdata->offset = NCR53C400_mem_base;
236 switch (board) {
237 case BOARD_NCR53C400:
238 hostdata->c400_ctl_status = 0x100;
239 hostdata->c400_blk_cnt = 0x101;
240 hostdata->c400_host_buf = 0x104;
241 break;
242 case BOARD_DTC3181E:
243 case BOARD_NCR53C400A:
244 case BOARD_HP_C2502:
245 pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
246 ret = -EINVAL;
247 goto out_unregister;
248 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200249 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200250
Ondrej Zary89fa9b52016-12-05 01:07:19 -0500251 /* Check for vacant slot */
252 NCR5380_write(MODE_REG, 0);
253 if (NCR5380_read(MODE_REG) != 0) {
254 ret = -ENODEV;
255 goto out_unregister;
256 }
257
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200258 ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
259 if (ret)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200260 goto out_unregister;
261
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200262 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200263 case BOARD_NCR53C400:
264 case BOARD_DTC3181E:
265 case BOARD_NCR53C400A:
266 case BOARD_HP_C2502:
267 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
268 }
269
270 NCR5380_maybe_reset_bus(instance);
271
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200272 if (irq != IRQ_AUTO)
273 instance->irq = irq;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200274 else
275 instance->irq = NCR5380_probe_irq(instance, 0xffff);
276
277 /* Compatibility with documented NCR5380 kernel parameters */
278 if (instance->irq == 255)
279 instance->irq = NO_IRQ;
280
281 if (instance->irq != NO_IRQ) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200282 /* set IRQ for HP C2502 */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200283 if (board == BOARD_HP_C2502)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200284 magic_configure(port_idx, instance->irq, magic);
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200285 if (request_irq(instance->irq, generic_NCR5380_intr,
286 0, "NCR5380", instance)) {
287 printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
288 instance->irq = NO_IRQ;
289 }
290 }
291
292 if (instance->irq == NO_IRQ) {
293 printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
294 printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
295 }
296
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200297 ret = scsi_add_host(instance, pdev);
298 if (ret)
299 goto out_free_irq;
300 scsi_scan_host(instance);
301 dev_set_drvdata(pdev, instance);
302 return 0;
Finn Thain0ad0eff2016-01-03 16:05:21 +1100303
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200304out_free_irq:
305 if (instance->irq != NO_IRQ)
306 free_irq(instance->irq, instance);
307 NCR5380_exit(instance);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100308out_unregister:
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200309 scsi_host_put(instance);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400310out_unmap:
Finn Thain0ad0eff2016-01-03 16:05:21 +1100311 iounmap(iomem);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400312out_release:
313 if (is_pmio)
314 release_region(base, region_size);
315 else
316 release_mem_region(base, region_size);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200317 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318}
319
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200320static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400322 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Finn Thain820682b2016-10-10 00:46:53 -0400323 void __iomem *iomem = hostdata->io;
324 unsigned long io_port = hostdata->io_port;
325 unsigned long base = hostdata->base;
326 unsigned long region_size = hostdata->region_size;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400327
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200328 scsi_remove_host(instance);
Finn Thain22f5f102014-11-12 16:11:56 +1100329 if (instance->irq != NO_IRQ)
Jeff Garzik1e641662007-11-11 19:52:05 -0500330 free_irq(instance->irq, instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 NCR5380_exit(instance);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200332 scsi_host_put(instance);
Finn Thain820682b2016-10-10 00:46:53 -0400333 iounmap(iomem);
334 if (io_port)
335 release_region(io_port, region_size);
336 else
337 release_mem_region(base, region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338}
339
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100341 * generic_NCR5380_pread - pseudo DMA read
Finn Thain4a98f892016-10-10 00:46:53 -0400342 * @hostdata: scsi host private data
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 * @dst: buffer to read into
344 * @len: buffer length
345 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300346 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 * controller
348 */
349
Finn Thain4a98f892016-10-10 00:46:53 -0400350static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata,
Finn Thain6c4b88c2016-03-23 21:10:17 +1100351 unsigned char *dst, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352{
353 int blocks = len / 128;
354 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355
Ondrej Zary12150792016-01-03 16:06:15 +1100356 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
357 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100359 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100361 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362 printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
363 return -1;
364 }
Ondrej Zary12150792016-01-03 16:06:15 +1100365 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
366 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367
Finn Thain820682b2016-10-10 00:46:53 -0400368 if (hostdata->io_port && hostdata->io_width == 2)
369 insw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100370 dst + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400371 else if (hostdata->io_port)
372 insb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100373 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400374 else
375 memcpy_fromio(dst + start,
Finn Thain820682b2016-10-10 00:46:53 -0400376 hostdata->io + NCR53C400_host_buffer, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400377
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 start += 128;
379 blocks--;
380 }
381
382 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100383 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
384 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385
Finn Thain820682b2016-10-10 00:46:53 -0400386 if (hostdata->io_port && hostdata->io_width == 2)
387 insw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100388 dst + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400389 else if (hostdata->io_port)
390 insb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100391 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400392 else
393 memcpy_fromio(dst + start,
Finn Thain820682b2016-10-10 00:46:53 -0400394 hostdata->io + NCR53C400_host_buffer, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400395
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 start += 128;
397 blocks--;
398 }
399
Ondrej Zary12150792016-01-03 16:06:15 +1100400 if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 printk("53C400r: no 53C80 gated irq after transfer");
402
Ondrej Zary42fc6372016-01-03 16:06:18 +1100403 /* wait for 53C80 registers to be available */
404 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 ;
Ondrej Zary42fc6372016-01-03 16:06:18 +1100406
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
408 printk(KERN_ERR "53C400r: no end dma signal\n");
409
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 return 0;
411}
412
413/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100414 * generic_NCR5380_pwrite - pseudo DMA write
Finn Thain4a98f892016-10-10 00:46:53 -0400415 * @hostdata: scsi host private data
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416 * @dst: buffer to read into
417 * @len: buffer length
418 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300419 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 * controller
421 */
422
Finn Thain4a98f892016-10-10 00:46:53 -0400423static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata,
Finn Thain6c4b88c2016-03-23 21:10:17 +1100424 unsigned char *src, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425{
426 int blocks = len / 128;
427 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428
Ondrej Zary12150792016-01-03 16:06:15 +1100429 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
430 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100432 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
434 return -1;
435 }
436
Ondrej Zary12150792016-01-03 16:06:15 +1100437 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100439 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440 ; // FIXME - timeout
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400441
Finn Thain820682b2016-10-10 00:46:53 -0400442 if (hostdata->io_port && hostdata->io_width == 2)
443 outsw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100444 src + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400445 else if (hostdata->io_port)
446 outsb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100447 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400448 else
Finn Thain820682b2016-10-10 00:46:53 -0400449 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400450 src + start, 128);
451
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452 start += 128;
453 blocks--;
454 }
455 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100456 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 ; // FIXME - no timeout
458
Finn Thain820682b2016-10-10 00:46:53 -0400459 if (hostdata->io_port && hostdata->io_width == 2)
460 outsw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100461 src + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400462 else if (hostdata->io_port)
463 outsb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100464 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400465 else
Finn Thain820682b2016-10-10 00:46:53 -0400466 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400467 src + start, 128);
468
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 start += 128;
470 blocks--;
471 }
472
Ondrej Zary42fc6372016-01-03 16:06:18 +1100473 /* wait for 53C80 registers to be available */
474 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100475 udelay(4); /* DTC436 chip hangs without this */
476 /* FIXME - no timeout */
477 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
480 printk(KERN_ERR "53C400w: no end dma signal\n");
481 }
Ondrej Zary42fc6372016-01-03 16:06:18 +1100482
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
484 ; // TIMEOUT
485 return 0;
486}
Finn Thainff3d4572016-01-03 16:05:25 +1100487
Finn Thain4a98f892016-10-10 00:46:53 -0400488static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100489 struct scsi_cmnd *cmd)
Finn Thainff3d4572016-01-03 16:05:25 +1100490{
491 int transfersize = cmd->transfersize;
492
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100493 if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
494 return 0;
495
Finn Thainff3d4572016-01-03 16:05:25 +1100496 /* Limit transfers to 32K, for xx400 & xx406
497 * pseudoDMA that transfers in 128 bytes blocks.
498 */
499 if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
500 !(cmd->SCp.this_residual % transfersize))
501 transfersize = 32 * 1024;
502
Ondrej Zaryf0394622016-01-03 16:06:14 +1100503 /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
504 if (transfersize % 128)
505 transfersize = 0;
506
Finn Thainff3d4572016-01-03 16:05:25 +1100507 return transfersize;
508}
509
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510/*
511 * Include the NCR5380 core code that we build our driver around
512 */
513
514#include "NCR5380.c"
515
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +0100516static struct scsi_host_template driver_template = {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200517 .module = THIS_MODULE,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100518 .proc_name = DRV_MODULE_NAME,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100519 .name = "Generic NCR5380/NCR53C400 SCSI",
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100520 .info = generic_NCR5380_info,
521 .queuecommand = generic_NCR5380_queue_command,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522 .eh_abort_handler = generic_NCR5380_abort,
523 .eh_bus_reset_handler = generic_NCR5380_bus_reset,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100524 .can_queue = 16,
525 .this_id = 7,
526 .sg_tablesize = SG_ALL,
527 .cmd_per_lun = 2,
528 .use_clustering = DISABLE_CLUSTERING,
Finn Thain32b26a12016-01-03 16:05:58 +1100529 .cmd_size = NCR5380_CMD_SIZE,
Finn Thain0a4e3612016-01-03 16:06:07 +1100530 .max_sectors = 128,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531};
Finn Thain161c0052016-01-03 16:05:46 +1100532
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200534static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
535{
536 int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
537 irq[ndev], card[ndev]);
538 if (ret) {
539 if (base[ndev])
540 printk(KERN_WARNING "Card not found at address 0x%03x\n",
541 base[ndev]);
542 return 0;
543 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200545 return 1;
546}
547
548static int generic_NCR5380_isa_remove(struct device *pdev,
549 unsigned int ndev)
550{
551 generic_NCR5380_release_resources(dev_get_drvdata(pdev));
552 dev_set_drvdata(pdev, NULL);
553 return 0;
554}
555
556static struct isa_driver generic_NCR5380_isa_driver = {
557 .match = generic_NCR5380_isa_match,
558 .remove = generic_NCR5380_isa_remove,
559 .driver = {
560 .name = DRV_MODULE_NAME
561 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562};
563
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400564#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200565static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
566 { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
567 { .id = "" }
568};
569MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
570
571static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
572 const struct pnp_device_id *id)
573{
574 int base, irq;
575
576 if (pnp_activate_dev(pdev) < 0)
577 return -EBUSY;
578
579 base = pnp_port_start(pdev, 0);
580 irq = pnp_irq(pdev, 0);
581
582 return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
583 id->driver_data);
584}
585
586static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
587{
588 generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
589 pnp_set_drvdata(pdev, NULL);
590}
591
592static struct pnp_driver generic_NCR5380_pnp_driver = {
593 .name = DRV_MODULE_NAME,
594 .id_table = generic_NCR5380_pnp_ids,
595 .probe = generic_NCR5380_pnp_probe,
596 .remove = generic_NCR5380_pnp_remove,
597};
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400598#endif /* defined(CONFIG_PNP) */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200599
600static int pnp_registered, isa_registered;
601
602static int __init generic_NCR5380_init(void)
603{
604 int ret = 0;
605
606 /* compatibility with old-style parameters */
607 if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
608 irq[0] = ncr_irq;
609 base[0] = ncr_addr;
610 if (ncr_5380)
611 card[0] = BOARD_NCR5380;
612 if (ncr_53c400)
613 card[0] = BOARD_NCR53C400;
614 if (ncr_53c400a)
615 card[0] = BOARD_NCR53C400A;
616 if (dtc_3181e)
617 card[0] = BOARD_DTC3181E;
618 if (hp_c2502)
619 card[0] = BOARD_HP_C2502;
620 }
621
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400622#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200623 if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
624 pnp_registered = 1;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700625#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200626 ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
627 if (!ret)
628 isa_registered = 1;
629
630 return (pnp_registered || isa_registered) ? 0 : ret;
631}
632
633static void __exit generic_NCR5380_exit(void)
634{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400635#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200636 if (pnp_registered)
637 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
638#endif
639 if (isa_registered)
640 isa_unregister_driver(&generic_NCR5380_isa_driver);
641}
642
643module_init(generic_NCR5380_init);
644module_exit(generic_NCR5380_exit);