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Hariprasad Shenai324429d2016-08-17 12:33:05 +05301/*
2 * This file is part of the Chelsio T6 Crypto driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 */
35
36#ifndef __CHCR_CRYPTO_H__
37#define __CHCR_CRYPTO_H__
38
Harsh Jain2debd332016-11-29 19:00:43 +053039#define GHASH_BLOCK_SIZE 16
40#define GHASH_DIGEST_SIZE 16
41
42#define CCM_B0_SIZE 16
43#define CCM_AAD_FIELD_SIZE 2
Harsh Jain1f479e42018-12-11 16:21:37 +053044// 511 - 16(For IV)
45#define T6_MAX_AAD_SIZE 495
Harsh Jain2debd332016-11-29 19:00:43 +053046
47
Hariprasad Shenai324429d2016-08-17 12:33:05 +053048/* Define following if h/w is not dropping the AAD and IV data before
49 * giving the processed data
50 */
51
Harsh Jaine29abda2017-04-10 18:23:58 +053052#define CHCR_CRA_PRIORITY 500
53#define CHCR_AEAD_PRIORITY 6000
Hariprasad Shenai324429d2016-08-17 12:33:05 +053054#define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
55#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
56
57#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
58#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
59
60#define CHCR_GIVENCRYPT_OP 2
61/* CPL/SCMD parameters */
62
63#define CHCR_ENCRYPT_OP 0
64#define CHCR_DECRYPT_OP 1
65
66#define CHCR_SCMD_SEQ_NO_CTRL_32BIT 1
67#define CHCR_SCMD_SEQ_NO_CTRL_48BIT 2
68#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3
69
70#define CHCR_SCMD_PROTO_VERSION_GENERIC 4
71
72#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
73#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
74
Harsh Jain2debd332016-11-29 19:00:43 +053075#define CHCR_SCMD_CIPHER_MODE_NOP 0
76#define CHCR_SCMD_CIPHER_MODE_AES_CBC 1
77#define CHCR_SCMD_CIPHER_MODE_AES_GCM 2
78#define CHCR_SCMD_CIPHER_MODE_AES_CTR 3
79#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 4
80#define CHCR_SCMD_CIPHER_MODE_AES_XTS 6
81#define CHCR_SCMD_CIPHER_MODE_AES_CCM 7
Hariprasad Shenai324429d2016-08-17 12:33:05 +053082
83#define CHCR_SCMD_AUTH_MODE_NOP 0
84#define CHCR_SCMD_AUTH_MODE_SHA1 1
85#define CHCR_SCMD_AUTH_MODE_SHA224 2
86#define CHCR_SCMD_AUTH_MODE_SHA256 3
Harsh Jain2debd332016-11-29 19:00:43 +053087#define CHCR_SCMD_AUTH_MODE_GHASH 4
Hariprasad Shenai324429d2016-08-17 12:33:05 +053088#define CHCR_SCMD_AUTH_MODE_SHA512_224 5
89#define CHCR_SCMD_AUTH_MODE_SHA512_256 6
90#define CHCR_SCMD_AUTH_MODE_SHA512_384 7
91#define CHCR_SCMD_AUTH_MODE_SHA512_512 8
Harsh Jain2debd332016-11-29 19:00:43 +053092#define CHCR_SCMD_AUTH_MODE_CBCMAC 9
93#define CHCR_SCMD_AUTH_MODE_CMAC 10
Hariprasad Shenai324429d2016-08-17 12:33:05 +053094
95#define CHCR_SCMD_HMAC_CTRL_NOP 0
96#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 1
Harsh Jain2debd332016-11-29 19:00:43 +053097#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 2
98#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 3
99#define CHCR_SCMD_HMAC_CTRL_PL1 4
100#define CHCR_SCMD_HMAC_CTRL_PL2 5
101#define CHCR_SCMD_HMAC_CTRL_PL3 6
102#define CHCR_SCMD_HMAC_CTRL_DIV2 7
103#define VERIFY_HW 0
104#define VERIFY_SW 1
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530105
106#define CHCR_SCMD_IVGEN_CTRL_HW 0
107#define CHCR_SCMD_IVGEN_CTRL_SW 1
108/* This are not really mac key size. They are intermediate values
109 * of sha engine and its size
110 */
111#define CHCR_KEYCTX_MAC_KEY_SIZE_128 0
112#define CHCR_KEYCTX_MAC_KEY_SIZE_160 1
113#define CHCR_KEYCTX_MAC_KEY_SIZE_192 2
114#define CHCR_KEYCTX_MAC_KEY_SIZE_256 3
115#define CHCR_KEYCTX_MAC_KEY_SIZE_512 4
116#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0
117#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1
118#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2
119#define CHCR_KEYCTX_NO_KEY 15
120
121#define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */
122#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
123#define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */
124
125#define KEY_CONTEXT_HDR_SALT_AND_PAD 16
126#define flits_to_bytes(x) (x * 8)
127
128#define IV_NOP 0
129#define IV_IMMEDIATE 1
130#define IV_DSGL 2
131
Harsh Jain2debd332016-11-29 19:00:43 +0530132#define AEAD_H_SIZE 16
133
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530134#define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000
135#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000
Harsh Jain2debd332016-11-29 19:00:43 +0530136#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000
137#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000
Harsh Jain3d64bd62018-01-11 16:45:51 +0530138#define CRYPTO_ALG_SUB_TYPE_CBC_SHA 0x04000000
Harsh Jain2debd332016-11-29 19:00:43 +0530139#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000
140#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000
Harsh Jain3d64bd62018-01-11 16:45:51 +0530141#define CRYPTO_ALG_SUB_TYPE_CBC_NULL 0x07000000
Harsh Jain2debd332016-11-29 19:00:43 +0530142#define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000
Harsh Jainb8fd1f42017-06-15 12:43:43 +0530143#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000
144#define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000
145#define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000
Harsh Jain3d64bd62018-01-11 16:45:51 +0530146#define CRYPTO_ALG_SUB_TYPE_CTR_SHA 0x0c000000
147#define CRYPTO_ALG_SUB_TYPE_CTR_NULL 0x0d000000
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530148#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
149 CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
150
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530151#define MAX_SCRATCH_PAD_SIZE 32
152
153#define CHCR_HASH_MAX_BLOCK_SIZE_64 64
154#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
Harsh Jain2f47d582017-10-08 13:37:23 +0530155#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
156#define CHCR_DST_SG_SIZE 2048
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530157
Harsh Jain2f47d582017-10-08 13:37:23 +0530158static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
159{
160 return crypto_aead_ctx(tfm);
161}
162
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100163static inline struct chcr_context *c_ctx(struct crypto_skcipher *tfm)
Harsh Jain2f47d582017-10-08 13:37:23 +0530164{
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100165 return crypto_skcipher_ctx(tfm);
Harsh Jain2f47d582017-10-08 13:37:23 +0530166}
167
168static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
169{
170 return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
171}
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530172
173struct ablk_ctx {
Kees Cook28874f22018-09-18 19:10:56 -0700174 struct crypto_sync_skcipher *sw_cipher;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530175 __be32 key_ctx_hdr;
176 unsigned int enckey_len;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530177 unsigned char ciph_mode;
Harsh Jainb8fd1f42017-06-15 12:43:43 +0530178 u8 key[CHCR_AES_MAX_KEY_LEN];
179 u8 nonce[4];
Harsh Jain5c86a8f2016-11-29 19:00:42 +0530180 u8 rrkey[AES_MAX_KEY_SIZE];
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530181};
Harsh Jain2debd332016-11-29 19:00:43 +0530182struct chcr_aead_reqctx {
183 struct sk_buff *skb;
Harsh Jain2f47d582017-10-08 13:37:23 +0530184 dma_addr_t iv_dma;
185 dma_addr_t b0_dma;
186 unsigned int b0_len;
187 unsigned int op;
Harsh Jain2f47d582017-10-08 13:37:23 +0530188 u16 imm;
Harsh Jain2debd332016-11-29 19:00:43 +0530189 u16 verify;
Ayush Sawal567be3a2020-02-24 09:12:33 +0530190 u16 txqidx;
191 u16 rxqidx;
Harsh Jain4262c982018-05-24 17:26:39 +0530192 u8 iv[CHCR_MAX_CRYPTO_IV_LEN + MAX_SCRATCH_PAD_SIZE];
193 u8 *scratch_pad;
Harsh Jain2debd332016-11-29 19:00:43 +0530194};
195
Harsh Jain2f47d582017-10-08 13:37:23 +0530196struct ulptx_walk {
197 struct ulptx_sgl *sgl;
198 unsigned int nents;
199 unsigned int pair_idx;
200 unsigned int last_sg_len;
201 struct scatterlist *last_sg;
202 struct ulptx_sge_pair *pair;
203
204};
205
206struct dsgl_walk {
207 unsigned int nents;
208 unsigned int last_sg_len;
209 struct scatterlist *last_sg;
210 struct cpl_rx_phys_dsgl *dsgl;
211 struct phys_sge_pairs *to;
212};
213
Harsh Jain2debd332016-11-29 19:00:43 +0530214struct chcr_gcm_ctx {
215 u8 ghash_h[AEAD_H_SIZE];
216};
217
218struct chcr_authenc_ctx {
219 u8 dec_rrkey[AES_MAX_KEY_SIZE];
220 u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
221 unsigned char auth_mode;
222};
223
224struct __aead_ctx {
225 struct chcr_gcm_ctx gcm[0];
226 struct chcr_authenc_ctx authenc[0];
227};
228
Harsh Jain2debd332016-11-29 19:00:43 +0530229struct chcr_aead_ctx {
230 __be32 key_ctx_hdr;
231 unsigned int enckey_len;
Harsh Jain0e937082017-04-10 18:24:01 +0530232 struct crypto_aead *sw_cipher;
Harsh Jain2debd332016-11-29 19:00:43 +0530233 u8 salt[MAX_SALT];
234 u8 key[CHCR_AES_MAX_KEY_LEN];
Harsh Jain3d64bd62018-01-11 16:45:51 +0530235 u8 nonce[4];
Harsh Jain2debd332016-11-29 19:00:43 +0530236 u16 hmac_ctrl;
237 u16 mayverify;
238 struct __aead_ctx ctx[0];
239};
240
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530241struct hmac_ctx {
Harsh Jaine7922722016-11-29 19:00:41 +0530242 struct crypto_shash *base_hash;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530243 u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
244 u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
245};
246
247struct __crypto_ctx {
248 struct hmac_ctx hmacctx[0];
249 struct ablk_ctx ablkctx[0];
Harsh Jain2debd332016-11-29 19:00:43 +0530250 struct chcr_aead_ctx aeadctx[0];
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530251};
252
253struct chcr_context {
254 struct chcr_dev *dev;
Ayush Sawal567be3a2020-02-24 09:12:33 +0530255 unsigned char rxq_perchan;
256 unsigned char txq_perchan;
257 unsigned int ntxq;
258 unsigned int nrxq;
Ayush Sawal1c502e22020-02-05 10:48:41 +0530259 struct completion cbc_aes_aio_done;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530260 struct __crypto_ctx crypto_ctx[0];
261};
262
Harsh Jain5110e652018-03-06 10:37:52 +0530263struct chcr_hctx_per_wr {
264 struct scatterlist *srcsg;
265 struct sk_buff *skb;
Harsh Jain2f47d582017-10-08 13:37:23 +0530266 dma_addr_t dma_addr;
267 u32 dma_len;
Harsh Jain5110e652018-03-06 10:37:52 +0530268 unsigned int src_ofst;
269 unsigned int processed;
270 u32 result;
Harsh Jain2f47d582017-10-08 13:37:23 +0530271 u8 is_sg_map;
Harsh Jain5110e652018-03-06 10:37:52 +0530272 u8 imm;
273 /*Final callback called. Driver cannot rely on nbytes to decide
274 * final call
275 */
276 u8 isfinal;
277};
278
279struct chcr_ahash_req_ctx {
280 struct chcr_hctx_per_wr hctx_wr;
281 u8 *reqbfr;
282 u8 *skbfr;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530283 /* SKB which is being sent to the hardware for processing */
Harsh Jain5110e652018-03-06 10:37:52 +0530284 u64 data_len; /* Data len till time */
Ayush Sawal567be3a2020-02-24 09:12:33 +0530285 u16 txqidx;
286 u16 rxqidx;
Harsh Jain5110e652018-03-06 10:37:52 +0530287 u8 reqlen;
288 u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
289 u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
290 u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530291};
292
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100293struct chcr_skcipher_req_ctx {
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530294 struct sk_buff *skb;
Harsh Jainb8fd1f42017-06-15 12:43:43 +0530295 struct scatterlist *dstsg;
Harsh Jainb8fd1f42017-06-15 12:43:43 +0530296 unsigned int processed;
Harsh Jainde1a00a2017-10-08 13:37:21 +0530297 unsigned int last_req_len;
Ayush Sawalbed44d02020-02-24 09:12:32 +0530298 unsigned int partial_req;
Harsh Jain2f47d582017-10-08 13:37:23 +0530299 struct scatterlist *srcsg;
300 unsigned int src_ofst;
301 unsigned int dst_ofst;
Harsh Jainb8fd1f42017-06-15 12:43:43 +0530302 unsigned int op;
Harsh Jain2f47d582017-10-08 13:37:23 +0530303 u16 imm;
Harsh Jain5c86a8f2016-11-29 19:00:42 +0530304 u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
Devulapally Shiva Krishna6b363a22020-05-05 08:42:54 +0530305 u8 init_iv[CHCR_MAX_CRYPTO_IV_LEN];
Ayush Sawal567be3a2020-02-24 09:12:33 +0530306 u16 txqidx;
307 u16 rxqidx;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530308};
309
310struct chcr_alg_template {
311 u32 type;
312 u32 is_registered;
313 union {
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100314 struct skcipher_alg skcipher;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530315 struct ahash_alg hash;
Harsh Jain2debd332016-11-29 19:00:43 +0530316 struct aead_alg aead;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530317 } alg;
318};
319
Harsh Jain2debd332016-11-29 19:00:43 +0530320typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530321 unsigned short qid,
Harsh Jain4262c982018-05-24 17:26:39 +0530322 int size);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530323
Atul Gupta6dad4e82017-11-16 16:57:08 +0530324void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
325int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
326 unsigned short op_type);
327void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,
328 unsigned short op_type);
329void chcr_add_aead_dst_ent(struct aead_request *req,
330 struct cpl_rx_phys_dsgl *phys_cpl,
Atul Gupta6dad4e82017-11-16 16:57:08 +0530331 unsigned short qid);
Harsh Jain1f479e42018-12-11 16:21:37 +0530332void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx);
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100333void chcr_add_cipher_src_ent(struct skcipher_request *req,
Harsh Jain335bcc42018-05-24 17:26:38 +0530334 void *ulptx,
Atul Gupta6dad4e82017-11-16 16:57:08 +0530335 struct cipher_wr_param *wrparam);
Ard Biesheuvel7cea6d32019-11-09 18:09:38 +0100336int chcr_cipher_dma_map(struct device *dev, struct skcipher_request *req);
337void chcr_cipher_dma_unmap(struct device *dev, struct skcipher_request *req);
338void chcr_add_cipher_dst_ent(struct skcipher_request *req,
Atul Gupta6dad4e82017-11-16 16:57:08 +0530339 struct cpl_rx_phys_dsgl *phys_cpl,
340 struct cipher_wr_param *wrparam,
341 unsigned short qid);
Harsh Jain2f47d582017-10-08 13:37:23 +0530342int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
Atul Gupta6dad4e82017-11-16 16:57:08 +0530343void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,
344 struct hash_wr_param *param);
345int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);
346void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);
Harsh Jain4262c982018-05-24 17:26:39 +0530347void chcr_aead_common_exit(struct aead_request *req);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530348#endif /* __CHCR_CRYPTO_H__ */