blob: 6a2f427768ca9cf6b081797d5b8025a5e1501d51 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * PCI Express Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
Kristen Accardi8cf4c192005-08-16 15:16:10 -070026 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 *
28 */
29#ifndef _PCIEHP_H
30#define _PCIEHP_H
31
32#include <linux/types.h>
33#include <linux/pci.h>
Greg Kroah-Hartman7a54f252006-10-13 20:05:19 -070034#include <linux/pci_hotplug.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/delay.h>
Tim Schmielaude259682006-01-08 01:02:05 -080036#include <linux/sched.h> /* signal_pending() */
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/pcieport_if.h>
Ingo Molnar6aa4cdd2006-01-13 16:02:15 +010038#include <linux/mutex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
40#define MY_NAME "pciehp"
41
42extern int pciehp_poll_mode;
43extern int pciehp_poll_time;
44extern int pciehp_debug;
rajesh.shah@intel.coma3a45ec2005-10-31 16:20:12 -080045extern int pciehp_force;
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
47/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
48#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
49#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
50#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
51#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
52
Kenji Kaneshigea0b17252006-12-21 17:01:02 -080053#define SLOT_NAME_SIZE 10
Linus Torvalds1da177e2005-04-16 15:20:36 -070054struct slot {
55 struct slot *next;
56 u8 bus;
57 u8 device;
58 u32 number;
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 u8 state;
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 struct timer_list task_event;
61 u8 hp_slot;
62 struct controller *ctrl;
63 struct hpc_ops *hpc_ops;
64 struct hotplug_slot *hotplug_slot;
65 struct list_head slot_list;
Kenji Kaneshigea0b17252006-12-21 17:01:02 -080066 char name[SLOT_NAME_SIZE];
Linus Torvalds1da177e2005-04-16 15:20:36 -070067};
68
Linus Torvalds1da177e2005-04-16 15:20:36 -070069struct event_info {
70 u32 event_type;
71 u8 hp_slot;
72};
73
rajesh.shah@intel.comed6cbcf2005-10-31 16:20:09 -080074typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
75
76struct php_ctlr_state_s {
77 struct php_ctlr_state_s *pnext;
78 struct pci_dev *pci_dev;
79 unsigned int irq;
80 unsigned long flags; /* spinlock's */
81 u32 slot_device_offset;
82 u32 num_slots;
83 struct timer_list int_poll_timer; /* Added for poll event */
84 php_intr_callback_t attention_button_callback;
85 php_intr_callback_t switch_change_callback;
86 php_intr_callback_t presence_change_callback;
87 php_intr_callback_t power_fault_callback;
88 void *callback_instance_id;
89 struct ctrl_reg *creg; /* Ptr to controller register space */
90};
91
92#define MAX_EVENTS 10
Linus Torvalds1da177e2005-04-16 15:20:36 -070093struct controller {
94 struct controller *next;
Ingo Molnar6aa4cdd2006-01-13 16:02:15 +010095 struct mutex crit_sect; /* critical section mutex */
Kenji Kaneshigedd5619c2006-09-22 10:17:29 -070096 struct mutex ctrl_lock; /* controller lock */
rajesh.shah@intel.comed6cbcf2005-10-31 16:20:09 -080097 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
Linus Torvalds1da177e2005-04-16 15:20:36 -070098 int num_slots; /* Number of slots on ctlr */
99 int slot_num_inc; /* 1 or -1 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 struct pci_dev *pci_dev;
101 struct pci_bus *pci_bus;
rajesh.shah@intel.comed6cbcf2005-10-31 16:20:09 -0800102 struct event_info event_queue[MAX_EVENTS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 struct slot *slot;
104 struct hpc_ops *hpc_ops;
105 wait_queue_head_t queue; /* sleep & wake process */
106 u8 next_event;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 u8 bus;
108 u8 device;
109 u8 function;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 u8 slot_device_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
112 u8 slot_bus; /* Bus where the slots handled by this controller sit */
113 u8 ctrlcap;
114 u16 vendor_id;
Dely Sy8b245e42005-05-06 17:19:09 -0700115 u8 cap_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116};
117
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118#define INT_BUTTON_IGNORE 0
119#define INT_PRESENCE_ON 1
120#define INT_PRESENCE_OFF 2
121#define INT_SWITCH_CLOSE 3
122#define INT_SWITCH_OPEN 4
123#define INT_POWER_FAULT 5
124#define INT_POWER_FAULT_CLEAR 6
125#define INT_BUTTON_PRESS 7
126#define INT_BUTTON_RELEASE 8
127#define INT_BUTTON_CANCEL 9
128
129#define STATIC_STATE 0
130#define BLINKINGON_STATE 1
131#define BLINKINGOFF_STATE 2
132#define POWERON_STATE 3
133#define POWEROFF_STATE 4
134
135#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
136
137/* Error messages */
138#define INTERLOCK_OPEN 0x00000002
139#define ADD_NOT_SUPPORTED 0x00000003
140#define CARD_FUNCTIONING 0x00000005
141#define ADAPTER_NOT_SAME 0x00000006
142#define NO_ADAPTER_PRESENT 0x00000009
143#define NOT_ENOUGH_RESOURCES 0x0000000B
144#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
145#define WRONG_BUS_FREQUENCY 0x0000000D
146#define POWER_FAILURE 0x0000000E
147
148#define REMOVE_NOT_SUPPORTED 0x00000003
149
150#define DISABLE_CARD 1
151
152/* Field definitions in Slot Capabilities Register */
153#define ATTN_BUTTN_PRSN 0x00000001
154#define PWR_CTRL_PRSN 0x00000002
155#define MRL_SENS_PRSN 0x00000004
156#define ATTN_LED_PRSN 0x00000008
157#define PWR_LED_PRSN 0x00000010
158#define HP_SUPR_RM_SUP 0x00000020
159
160#define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
161#define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
162#define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
163#define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
164#define PWR_LED(cap) (cap & PWR_LED_PRSN)
165#define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
166
167/*
168 * error Messages
169 */
170#define msg_initialization_err "Initialization failure, error=%d\n"
Kenji Kaneshige49ed2b42006-09-22 10:17:10 -0700171#define msg_button_on "PCI slot #%s - powering on due to button press.\n"
172#define msg_button_off "PCI slot #%s - powering off due to button press.\n"
173#define msg_button_cancel "PCI slot #%s - action canceled due to button press.\n"
174#define msg_button_ignore "PCI slot #%s - button press ignored. (action in progress...)\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175
176/* controller functions */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177extern int pciehp_event_start_thread (void);
178extern void pciehp_event_stop_thread (void);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179extern int pciehp_enable_slot (struct slot *slot);
180extern int pciehp_disable_slot (struct slot *slot);
181
182extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
183extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
184extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
185extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
186/* extern void long_delay (int delay); */
187
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188/* pci functions */
rajesh.shah@intel.comca22a5e2005-10-31 16:20:08 -0800189extern int pciehp_configure_device (struct slot *p_slot);
190extern int pciehp_unconfigure_device (struct slot *p_slot);
rajesh.shah@intel.coma8a2be92005-10-31 16:20:07 -0800191
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
193
194/* Global variables */
195extern struct controller *pciehp_ctrl_list;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196
197/* Inline functions */
198
199static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
200{
201 struct slot *p_slot, *tmp_slot = NULL;
202
203 p_slot = ctrl->slot;
204
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205 while (p_slot && (p_slot->device != device)) {
206 tmp_slot = p_slot;
207 p_slot = p_slot->next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 }
209 if (p_slot == NULL) {
210 err("ERROR: pciehp_find_slot device=0x%x\n", device);
211 p_slot = tmp_slot;
212 }
213
214 return p_slot;
215}
216
217static inline int wait_for_ctrl_irq(struct controller *ctrl)
218{
219 int retval = 0;
220
221 DECLARE_WAITQUEUE(wait, current);
222
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223 add_wait_queue(&ctrl->queue, &wait);
224 if (!pciehp_poll_mode)
225 /* Sleep for up to 1 second */
226 msleep_interruptible(1000);
227 else
228 msleep_interruptible(2500);
229
230 remove_wait_queue(&ctrl->queue, &wait);
231 if (signal_pending(current))
232 retval = -EINTR;
233
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 return retval;
235}
236
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237enum php_ctlr_type {
238 PCI,
239 ISA,
240 ACPI
241};
242
rajesh.shah@intel.comed6cbcf2005-10-31 16:20:09 -0800243int pcie_init(struct controller *ctrl, struct pcie_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244
245/* This has no meaning for PCI Express, as there is only 1 slot per port */
246int pcie_get_ctlr_slot_config(struct controller *ctrl,
247 int *num_ctlr_slots,
248 int *first_device_num,
249 int *physical_slot_num,
250 u8 *ctrlcap);
251
252struct hpc_ops {
253 int (*power_on_slot) (struct slot *slot);
254 int (*power_off_slot) (struct slot *slot);
255 int (*get_power_status) (struct slot *slot, u8 *status);
256 int (*get_attention_status) (struct slot *slot, u8 *status);
257 int (*set_attention_status) (struct slot *slot, u8 status);
258 int (*get_latch_status) (struct slot *slot, u8 *status);
259 int (*get_adapter_status) (struct slot *slot, u8 *status);
260
261 int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
262 int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
263
264 int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value);
265 int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value);
266
267 int (*query_power_fault) (struct slot *slot);
268 void (*green_led_on) (struct slot *slot);
269 void (*green_led_off) (struct slot *slot);
270 void (*green_led_blink) (struct slot *slot);
271 void (*release_ctlr) (struct controller *ctrl);
272 int (*check_lnk_status) (struct controller *ctrl);
273};
274
Kristen Accardi783c49f2006-03-03 10:16:05 -0800275
276#ifdef CONFIG_ACPI
Kristen Carlson Accardie50d1082006-08-08 09:44:26 -0400277#include <acpi/acpi.h>
278#include <acpi/acpi_bus.h>
279#include <acpi/actypes.h>
280#include <linux/pci-acpi.h>
281
Kristen Accardi783c49f2006-03-03 10:16:05 -0800282#define pciehp_get_hp_hw_control_from_firmware(dev) \
283 pciehp_acpi_get_hp_hw_control_from_firmware(dev)
284static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
285 struct hotplug_params *hpp)
286{
Kenji Kaneshige7430e342006-05-02 10:54:50 +0900287 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev->bus, hpp)))
Kristen Accardi783c49f2006-03-03 10:16:05 -0800288 return -ENODEV;
289 return 0;
290}
291#else
292#define pciehp_get_hp_hw_control_from_firmware(dev) 0
293#define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV)
294#endif /* CONFIG_ACPI */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295#endif /* _PCIEHP_H */